seg7_1.fit.eqn

用VHTL描述7段数码管器

--c[0] is c[0] at LC14
c[0]_reg_input = VCC;
c[0] = TFFE(c[0]_reg_input, GLOBAL(clk), , !reset, );


--A1L52 is clk~6 at LC45
A1L52_or_out = clk;
A1L52 = A1L52_or_out;


--c[1] is c[1] at LC13
c[1]_or_out = c[0];
c[1]_reg_input = c[1]_or_out;
c[1] = TFFE(c[1]_reg_input, GLOBAL(clk), , !reset, );


--c[2] is c[2] at LC11
c[2]_p1_out = c[1] & c[0];
c[2]_or_out = c[2]_p1_out;
c[2]_reg_input = c[2]_or_out;
c[2] = TFFE(c[2]_reg_input, GLOBAL(clk), , !reset, );


--B1L1 is seg7_2:u1|b[0]~63 at LC25
B1L1_or_out = c[1];
B1L1 = c[2] $ B1L1_or_out;


--B1L3 is seg7_2:u1|b[3]~67 at LC3
B1L3_p1_out = !c[1] & c[0];
B1L3_or_out = !c[2];
B1L3 = B1L3_p1_out $ B1L3_or_out;


--B1L6 is seg7_2:u1|b[5]~72 at LC6
B1L6_p1_out = !c[1] & !c[0];
B1L6_or_out = B1L6_p1_out # !c[2];
B1L6 = B1L6_or_out;


--B1L21 is seg7_2:u1|clkout[5]~69 at LC29
B1L21_p1_out = !c[2] & !c[0];
B1L21_or_out = B1L21_p1_out;
B1L21 = B1L21_or_out;


--B1L31 is seg7_2:u1|clkout[5]~71 at LC59
B1L31_p1_out = !c[1] & !c[2] & !c[0];
B1L31_or_out = B1L31_p1_out;
B1L31 = !(B1L31_or_out);


--B1L11 is seg7_2:u1|clkout[4]~74 at LC57
B1L11_p1_out = !c[1] & !c[2] & c[0];
B1L11_or_out = B1L11_p1_out;
B1L11 = !(B1L11_or_out);


--B1L01 is seg7_2:u1|clkout[3]~77 at LC56
B1L01_p1_out = c[1] & !c[2] & !c[0];
B1L01_or_out = B1L01_p1_out;
B1L01 = !(B1L01_or_out);


--B1L9 is seg7_2:u1|clkout[2]~80 at LC53
B1L9_p1_out = c[1] & !c[2] & c[0];
B1L9_or_out = B1L9_p1_out;
B1L9 = !(B1L9_or_out);


--B1L8 is seg7_2:u1|clkout[1]~83 at LC51
B1L8_p1_out = !c[0] & c[2] & !c[1];
B1L8_or_out = B1L8_p1_out;
B1L8 = !(B1L8_or_out);


--B1L7 is seg7_2:u1|clkout[0]~86 at LC49
B1L7_p1_out = c[0] & c[2] & !c[1];
B1L7_or_out = B1L7_p1_out;
B1L7 = !(B1L7_or_out);


--B1L5 is seg7_2:u1|b[4]~75 at LC5
B1L5_p1_out = !c[2] & c[0];
B1L5_or_out = B1L5_p1_out # !c[1];
B1L5 = B1L5_or_out;


--B1L2 is seg7_2:u1|b[1]~78 at LC27
B1L2_p1_out = !c[2] & c[0];
B1L2_or_out = B1L2_p1_out # c[1];
B1L2 = !(B1L2_or_out);


--B1L4 is seg7_2:u1|b[3]~84 at LC8
B1L4_p1_out = c[2] & c[1];
B1L4_p2_out = c[2] & !c[0];
B1L4_p3_out = !c[2] & !c[1] & c[0];
B1L4_or_out = B1L4_p1_out # B1L4_p2_out # B1L4_p3_out;
B1L4 = !(B1L4_or_out);


--clk is clk at PIN_83
--operation mode is input

clk = INPUT();


--reset is reset at PIN_1
--operation mode is input

reset = INPUT();


--a[0] is a[0] at PIN_5
--operation mode is output

a[0] = OUTPUT(c[0]);


--ld1 is ld1 at PIN_25
--operation mode is output

ld1 = OUTPUT(A1L52);


--a[1] is a[1] at PIN_6
--operation mode is output

a[1] = OUTPUT(c[1]);


--a[2] is a[2] at PIN_8
--operation mode is output

a[2] = OUTPUT(c[2]);


--b[5] is b[5] at PIN_10
--operation mode is output

b[5] = OUTPUT(B1L6);


--b[3] is b[3] at PIN_12
--operation mode is output

b[3] = OUTPUT(B1L3);


--b[2] is b[2] at PIN_15
--operation mode is output

b[2] = OUTPUT(B1L21);


--b[0] is b[0] at PIN_17
--operation mode is output

b[0] = OUTPUT(B1L1);


--b[6] is b[6] at PIN_9
--operation mode is output

b[6] = OUTPUT(B1L4);


--b[4] is b[4] at PIN_11
--operation mode is output

b[4] = OUTPUT(B1L5);


--b[1] is b[1] at PIN_16
--operation mode is output

b[1] = OUTPUT(B1L2);


--clkout[5] is clkout[5] at PIN_35
--operation mode is output

clkout[5] = OUTPUT(B1L31);


--clkout[4] is clkout[4] at PIN_36
--operation mode is output

clkout[4] = OUTPUT(B1L11);


--clkout[3] is clkout[3] at PIN_37
--operation mode is output

clkout[3] = OUTPUT(B1L01);


--clkout[2] is clkout[2] at PIN_39
--operation mode is output

clkout[2] = OUTPUT(B1L9);


--clkout[1] is clkout[1] at PIN_40
--operation mode is output

clkout[1] = OUTPUT(B1L8);


--clkout[0] is clkout[0] at PIN_41
--operation mode is output

clkout[0] = OUTPUT(B1L7);