seg7_1.hif

用VHTL描述7段数码管器

Version 4.1 Build 181 06/29/2004 SJ Full Version
28
OFF
OFF
OFF
OFF
0
# entity
seg7_1
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
seg7_1.vhd
1147853254
4
# storage
db|seg7_1.(0).cnf
db|seg7_1.(0).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# entity
seg7_2
# architecture
A:seg7_2_arch
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
seg7_1.vhd
1147853254
4
# storage
db|seg7_1.(1).cnf
db|seg7_1.(1).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# complete