test_device.c

一个USB主机核的驱动程序

		SetBitOTGReg16(otg_IndexedCSR_RxMaxP, (0x0000 << 11));	
	else if (maxPacketSize == 64)
		SetBitOTGReg16(otg_IndexedCSR_RxMaxP, (0x0007 << 11));

	/* config DMA */
	SetBitOTGReg16(otg_CommonUSB_IntrRxEn, (0x0001 << endPointNum));	//disable Rx interrupt
	SetBitOTGReg16(otg_IndexedCSR_RxCSR, (RxCSR_prw_AutoClear | RxCSR_prw_DMAReqEnab | RxCSR_prw_DMAReqMode)); //config RXCSR
	WriteOTGReg32(&otg_RqPktCount[endPointNum], length / maxPacketSize);		
//	temp = ReadOTGReg32(&otg_RqPktCount[endPointNum]);

	WriteOTGReg32(otg_DMA_Addr, (WORD)dat);
	WriteOTGReg32(otg_DMA_Count, length);
	WriteOTGReg32(otg_DMA_Ctrl, 0);
	SetBitOTGReg32(otg_DMA_Ctrl, (endPointNum << 4));
	SetBitOTGReg32(otg_DMA_Ctrl, (DMA_Ctrl_EnDMA | DMA_Ctrl_Mode | DMA_Ctrl_IntrEn));

	/* send first in token */
//	SetBitOTGReg16(otg_IndexedCSR_RxCSR, RxCSR_hrw_ReqPkt);

	/* wait DMA unload data */
	while(1)
	{
		temp1 = ReadOTGReg32(otg_DMA_Intr);
		if ((temp1 & DMA_Intr_Ch1) != 0)	
			break;
	}/* end while */
	ClrBitOTGReg32(otg_DMA_Ctrl, (DMA_Ctrl_EnDMA | DMA_Ctrl_Mode | DMA_Ctrl_IntrEn));
	ClrBitOTGReg16(otg_IndexedCSR_RxCSR, (RxCSR_prw_AutoClear | RxCSR_prw_DMAReqEnab | RxCSR_prw_DMAReqMode)); //config RXCSR

	return TRUE;
}


extern BOOL
TestOTGDevBulkInTransaction(
	BYTE			endPointNum,
	BYTE			*dat,
	WORD			length
	)
{
	
	WORD		temp;

	/* set endpoint number */
	WriteOTGReg8(otg_CommonUSB_Index, endPointNum);

	/* load data into FIFO */
	LoadFIFOData((BYTE *)&otg_EndpointFIFO[endPointNum], dat, length);

	/* send out token */
	SetBitOTGReg16(otg_IndexedCSR_TxCSR, TxCSR_prs_TxPktRdy);

	while(1)
	{
		temp = ReadOTGReg16(otg_IndexedCSR_TxCSR);
		if ((temp & TxCSR_prs_TxPktRdy) == 0)
			break;
	}
	
	/* Wait EndPoint Tx interrupt */
//	while(1)
//	{
//		temp = ReadOTGReg16(otg_CommonUSB_IntrTx);
//		if ((temp & (0x0001 << endPointNum)) != 0)
//			break;
//	}/* end while */	

	return TRUE;
}


extern BOOL
TestOTGDevBulkInTransactionDMA(
	BYTE			endPointNum,
	BYTE			*dat,
	WORD			length
	)
{
	WORD		maxPacketSize;
	DWORD		temp1;

	/* set endpoint number */
	WriteOTGReg8(otg_CommonUSB_Index, endPointNum);

	/* config MPRx */
	maxPacketSize = (ReadOTGReg16(otg_IndexedCSR_TxMaxP) & 0x07FF);
	ClrBitOTGReg16(otg_IndexedCSR_TxMaxP, 0xF800);
	if (maxPacketSize == 512)	
		SetBitOTGReg16(otg_IndexedCSR_TxMaxP, (0x0000 << 11));	
	else if (maxPacketSize == 64)
		SetBitOTGReg16(otg_IndexedCSR_TxMaxP, (0x0007 << 11));

	/* config DMA */
	SetBitOTGReg16(otg_CommonUSB_IntrTxEn, (0x0001 << endPointNum));	
	SetBitOTGReg16(otg_IndexedCSR_TxCSR, (TxCSR_prw_AutoSet | TxCSR_prw_DMAReqEnab | TxCSR_prw_DMAReqMode)); //config TxCSR

	WriteOTGReg32(otg_DMA_Addr, (WORD)dat);
	WriteOTGReg32(otg_DMA_Count, length);
	WriteOTGReg32(otg_DMA_Ctrl, 0);
	SetBitOTGReg32(otg_DMA_Ctrl, (endPointNum << 4));
	SetBitOTGReg32(otg_DMA_Ctrl, (DMA_Ctrl_EnDMA | DMA_Ctrl_Direction | DMA_Ctrl_Mode | DMA_Ctrl_IntrEn));

	while(1)
	{
		temp1 = ReadOTGReg32(otg_DMA_Intr);
		if ((temp1 & DMA_Intr_Ch1) != 0)	
			break;
	}/* end while */
	ClrBitOTGReg32(otg_DMA_Ctrl, (DMA_Ctrl_EnDMA | DMA_Ctrl_Direction | DMA_Ctrl_Mode | DMA_Ctrl_IntrEn));
	ClrBitOTGReg16(otg_IndexedCSR_TxCSR, (TxCSR_prw_AutoSet | TxCSR_prw_DMAReqEnab | TxCSR_prw_DMAReqMode));
	
	return TRUE;
}


extern BOOL
TestOTGDevBulkTransfer(
	BOOL		isHS
	)
{
	static	BYTE	CODE	InquiryData[] = {0x00, 0x80, 0x00, 0x01, 0x1F, 0x73, 0x6D, 0x69, 
											0x53, 0x6F, 0x6E, 0x79, 0x20, 0x20, 0x20, 0x20, 
											0x53, 0x74, 0x6F, 0x72, 0x61, 0x67, 0x65, 0x20,
											0x4D, 0x65, 0x64, 0x69, 0x61, 0x20, 0x20, 0x20, 
											0x30, 0x31, 0x30, 0x30,};
	static	BYTE	CODE	FmtCapacityData[] = {0x00, 0x00, 0x00, 0x08, 0x00, 0x03, 0xDB, 0xFF, 0x02, 0x00, 0x02, 0x00,};
	static	BYTE	CODE	CapacityData[] = {0x00, 0x03, 0xDB, 0xFF, 0x00, 0x00, 0x02, 0x00,};
	static	BYTE	CODE	LBA0[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x2C, 0x44, 0x63, 0x18, 0x2E, 0x07, 0xC3, 0x00, 0x00, 0x00, 0x01, 
										0x01, 0x00, 0x0B, 0x20, 0x20, 0xF9, 0x20, 0x00, 0x00, 0x00, 0xE0, 0xDB, 0x03, 0x00, 0x00, 0x00,};
	static	BYTE	CODE	ModeSense[] = {0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C,};

	static	BYTE	XDATA	CSWData[] = {0x55, 0x53, 0x42, 0x53, 0x08, 0x70, 0xBA, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00,};


	BYTE	XDATA	val[20][64];
	BYTE	XDATA	buffer[512];
	WORD	length;
//	WORD	temp;

	/* set endpoint number */
	WriteOTGReg8(otg_CommonUSB_Index, 2);
	
	/* set Rx max packet size */
	if (!isHS)
		WriteOTGReg16(otg_IndexedCSR_RxMaxP, 64);
	else
		WriteOTGReg16(otg_IndexedCSR_RxMaxP, 512);
	/* set ClrDataTog for fisrt configuration */
//	SetBitOTGReg16(otg_IndexedCSR_RxCSR, RxCSR_ps_ClrDataTog);
	/* FIFO need flush */
//	temp = ReadOTGReg16(otg_IndexedCSR_RxCSR);
//	if ((temp & RxCSR_prc_RxPktRdy) != 0)
//		SetBitOTGReg16(otg_IndexedCSR_RxCSR, RxCSR_ps_FlushFIFO);

	
	/* set endpoint number */
	WriteOTGReg8(otg_CommonUSB_Index, 1);
	/* set endpoint 1 BULK Tx */	
	SetBitOTGReg16(otg_IndexedCSR_TxCSR, TxCSR_prw_Mode);
	/* set Tx max packet size */	
	if (!isHS)
		WriteOTGReg16(otg_IndexedCSR_TxMaxP, 64);
	else
		WriteOTGReg16(otg_IndexedCSR_TxMaxP, 512);
	/* set ClrDataTog for first configuration */
//	SetBitOTGReg16(otg_IndexedCSR_TxCSR, TxCSR_ps_ClrDataTog);
	/* check FIFO data empty */
//	temp = ReadOTGReg16(otg_IndexedCSR_TxCSR);
//	if ((temp & TxCSR_prc_FIFONotEmpty) != 0)
//		SetBitOTGReg16(otg_IndexedCSR_TxCSR, TxCSR_ps_FlushFIFO);


	/* inquiry */
	if (!TestOTGDevBulkOutTransaction(2, val[0], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[0][4], 4);
//	memset(&CSWData[4], 0x5A, 4);
	if (!TestOTGDevBulkInTransaction(1, InquiryData, sizeof(InquiryData)))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;

#if SIMHOST_DEBUG_EN
	/* test unit ready */
	if (!TestOTGDevBulkOutTransaction(2, val[1], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[1][4], 4);
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;
#else
	/* read format capacity */
	if (!TestOTGDevBulkOutTransaction(2, val[1], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[1][4], 4);
	if (!TestOTGDevBulkInTransaction(1, FmtCapacityData, sizeof(FmtCapacityData)))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;
#endif

	/* read capacity */
	if (!TestOTGDevBulkOutTransaction(2, val[2], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[2][4], 4);
	if (!TestOTGDevBulkInTransaction(1, CapacityData, sizeof(CapacityData)))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;

	/* read LBA 0 */
	memcpy(&buffer[432], &LBA0[0], 32);
	memset(&buffer[464], 0, 46);
	buffer[510] = 0x55;
	buffer[511] = 0xAA;
	ApplyREQ();
	memcpy((BYTE XDATA *)0xB000, buffer, 512);
	ReleaseREQ();
	if (!TestOTGDevBulkOutTransaction(2, val[3], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[3][4], 4);
#if SIMHOST_DEBUG_EN
	if (!TestOTGDevBulkInTransactionDMA(1, (BYTE XDATA *)0xB000, 8192))
		return FALSE;
#else
//	if (!TestOTGDevBulkInTransaction(1, buffer, sizeof(buffer)))
//		return FALSE;
	if (!TestOTGDevBulkInTransactionDMA(1, (BYTE XDATA *)0xB000, 512))
		return FALSE;
#endif
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;

	/* read LBA 0 */
	memcpy(&buffer[432], &LBA0[0], 32);
	memset(&buffer[464], 0, 46);
	buffer[510] = 0x55;
	buffer[511] = 0xAA;
	ApplyREQ();
	memcpy((BYTE XDATA *)0xB000, buffer, 512);
	ReleaseREQ();
	if (!TestOTGDevBulkOutTransaction(2, val[3], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[3][4], 4);
#if SIMHOST_DEBUG_EN
	if (!TestOTGDevBulkInTransactionDMA(1, (BYTE XDATA *)0xB000, 8192))
		return FALSE;
#else
//	if (!TestOTGDevBulkInTransaction(1, buffer, sizeof(buffer)))
//		return FALSE;
	if (!TestOTGDevBulkInTransactionDMA(1, (BYTE XDATA *)0xB000, 512))
		return FALSE;
#endif
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;

	/* read LBA 0 */
	memcpy(&buffer[432], &LBA0[0], 32);
	memset(&buffer[464], 0, 46);
	buffer[510] = 0x55;
	buffer[511] = 0xAA;
	ApplyREQ();
	memcpy((BYTE XDATA *)0xB000, buffer, 512);
	ReleaseREQ();
	if (!TestOTGDevBulkOutTransaction(2, val[3], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[3][4], 4);
#if SIMHOST_DEBUG_EN
	if (!TestOTGDevBulkInTransactionDMA(1, (BYTE XDATA *)0xB000, 8192))
		return FALSE;
#else
//	if (!TestOTGDevBulkInTransaction(1, buffer, sizeof(buffer)))
//		return FALSE;
	if (!TestOTGDevBulkInTransactionDMA(1, (BYTE XDATA *)0xB000, 512))
		return FALSE;
#endif
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;

	/* write LBA 0 */
#if SIMHOST_DEBUG_EN
	if (!TestOTGDevBulkOutTransaction(2, val[4], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[4][4], 4);
	if (!TestOTGDevBulkOutTransactionDMA(2, (BYTE XDATA *)0xB000, 8192))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;
#else

#endif

	/* write LBA 0 */
#if SIMHOST_DEBUG_EN
	if (!TestOTGDevBulkOutTransaction(2, val[4], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[4][4], 4);
	if (!TestOTGDevBulkOutTransactionDMA(2, (BYTE XDATA *)0xB000, 8192))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;
#else

#endif

	/* write LBA 0 */
#if SIMHOST_DEBUG_EN
	if (!TestOTGDevBulkOutTransaction(2, val[4], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[4][4], 4);
	if (!TestOTGDevBulkOutTransactionDMA(2, (BYTE XDATA *)0xB000, 8192))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;
#else

#endif

#if SIMHOST_DEBUG_EN == 0
	/* mode sense */
	if (!TestOTGDevBulkOutTransaction(2, val[4], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[4][4], 4);
	if (!TestOTGDevBulkInTransaction(1, ModeSense, sizeof(ModeSense)))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;

	/* mode sense */
	if (!TestOTGDevBulkOutTransaction(2, val[5], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[5][4], 4);
	if (!TestOTGDevBulkInTransaction(1, ModeSense, sizeof(ModeSense)))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;

	/* read capacity */
	if (!TestOTGDevBulkOutTransaction(2, val[6], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[6][4], 4);
	if (!TestOTGDevBulkInTransaction(1, CapacityData, sizeof(CapacityData)))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;

	/* read capacity */
	if (!TestOTGDevBulkOutTransaction(2, val[7], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[7][4], 4);
	if (!TestOTGDevBulkInTransaction(1, CapacityData, sizeof(CapacityData)))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;

	/* read LBA 0 */
	memcpy(&buffer[432], &LBA0[0], 32);
	memset(&buffer[464], 0, 46);
	buffer[510] = 0x55;
	buffer[511] = 0xAA;
	ApplyREQ();
	memcpy((BYTE XDATA *)0xB000, buffer, 512);
	ReleaseREQ();
	if (!TestOTGDevBulkOutTransaction(2, val[8], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[8][4], 4);
//	if (!TestOTGDevBulkInTransaction(1, buffer, sizeof(buffer)))
//		return FALSE;
	if (!TestOTGDevBulkInTransactionDMA(1, (BYTE XDATA *)0xB000, 512))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;

	/* read LBA 0 */
	memcpy(&buffer[432], &LBA0[0], 32);
	memset(&buffer[464], 0, 46);
	buffer[510] = 0x55;
	buffer[511] = 0xAA;
	ApplyREQ();
	memcpy((BYTE XDATA *)0xB000, buffer, 512);
	ReleaseREQ();
	if (!TestOTGDevBulkOutTransaction(2, val[9], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[9][4], 4);
//	if (!TestOTGDevBulkInTransaction(1, buffer, sizeof(buffer)))
//		return FALSE;
	if (!TestOTGDevBulkInTransactionDMA(1, (BYTE XDATA *)0xB000, 512))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;
	
	/* read capacity */
	if (!TestOTGDevBulkOutTransaction(2, val[10], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[10][4], 4);
	if (!TestOTGDevBulkInTransaction(1, CapacityData, sizeof(CapacityData)))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;

	/* read capacity */
	if (!TestOTGDevBulkOutTransaction(2, val[11], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[11][4], 4);
	if (!TestOTGDevBulkInTransaction(1, CapacityData, sizeof(CapacityData)))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;

	/* read LBA 0 */
	memcpy(&buffer[432], &LBA0[0], 32);
	memset(&buffer[464], 0, 46);
	buffer[510] = 0x55;
	buffer[511] = 0xAA;
	ApplyREQ();
	memcpy((BYTE XDATA *)0xB000, buffer, 512);
	ReleaseREQ();
	if (!TestOTGDevBulkOutTransaction(2, val[12], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[12][4], 4);
//	if (!TestOTGDevBulkInTransaction(1, buffer, sizeof(buffer)))
//		return FALSE;
	if (!TestOTGDevBulkInTransactionDMA(1, (BYTE XDATA *)0xB000, 512))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;

	/* read capacity */
	if (!TestOTGDevBulkOutTransaction(2, val[13], &length))
		return FALSE;
	memcpy(&CSWData[4], &val[13][4], 4);
	if (!TestOTGDevBulkInTransaction(1, CapacityData, sizeof(CapacityData)))
		return FALSE;
	if (!TestOTGDevBulkInTransaction(1, CSWData, sizeof(CSWData)))
		return FALSE;
#endif

	return TRUE;
}