📄 test_otg_reg.c
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/****************************************************************
* MT View Silicon Tech. Inc.
*
* Copyright 2007, MT View Silicon Tech. Inc., ShangHai, China
* All rights reserved.
*
*
* Filename: test_reg.c
*
* Programmer: Grey
*
* Created: 11/xx/2007
*
* Description: OTG register init value and read write test code
*
*
*****************************************************************/
#include "test_otg_reg.h"
extern BOOL
IsOTGRegInitValueOk(VOID)
{
BYTE DATA temp;
WORD DATA temp1;
/* chech FAddr register */
temp = 0xff;
temp = ReadOTGReg8(otg_CommonUSB_FAddr);
if (temp != 0)
return FALSE;
/* check Power register */
temp = 0xff;
temp = ReadOTGReg8(otg_CommonUSB_Power);
if (temp != 0x20)
return FALSE;
/* check IntrTx register */
temp1 = 0xffff;
temp1 = ReadOTGReg16(otg_CommonUSB_IntrTx);
if (temp1 != 0)
return FALSE;
/* check IntrRx register */
temp1 = 0xffff;
temp1 = ReadOTGReg16(otg_CommonUSB_IntrRx);
if (temp1 != 0)
return FALSE;
/* check IntrTxEn register */
temp1 = 0xffff;
temp1 = ReadOTGReg16(otg_CommonUSB_IntrTxEn);
if (temp1 != 0x001f)
return FALSE;
/* check IntrRxEn register */
temp1 = 0xffff;
temp1 = ReadOTGReg16(otg_CommonUSB_IntrRxEn);
if (temp1 != 0x001e)
return FALSE;
/* check IntrUSB register */
temp = 0xff;
temp = ReadOTGReg8(otg_CommonUSB_IntrUSB);
if (temp != 0)
return FALSE;
/* check IntrUSBE register */
temp = 0xff;
temp = ReadOTGReg8(otg_CommonUSB_IntrUSBE);
if (temp != 0x06)
return FALSE;
/* check Frame register */
temp1 = 0xffff;
temp1 = ReadOTGReg16(otg_CommonUSB_Frame);
if (temp1 != 0)
return FALSE;
/* check Index register */
temp = 0xff;
temp = ReadOTGReg8(otg_CommonUSB_Index);
if (temp != 0)
return FALSE;
/* check TestMode register */
temp = 0xff;
temp = ReadOTGReg8(otg_CommonUSB_TestMode);
if (temp != 0)
return FALSE;
/* check TxMaxP register */
temp1 = 0xffff;
temp1 = ReadOTGReg16(otg_IndexedCSR_TxMaxP);
if (temp1 != 0)
return FALSE;
/* check CSR0_TxCSR register */
// WriteOTGReg8(&otg->CommonUSB->Index, 0);
temp1 = 0xffff;
temp1 = ReadOTGReg16(otg_IndexedCSR_CSR0);
if (temp1 != 0)
return FALSE;
// WriteOTGReg8(&otg->CommonUSB->Index, 1);
// temp1 = 0xffff;
// if (!ReadOTGReg16(otg_IndexedCSR_CSR0, &temp1))
// return FALSE;
// if (temp1 != 0)
// return FALSE;
/* check RxMaxP register */
temp1 = 0xffff;
temp1 = ReadOTGReg16(otg_IndexedCSR_RxMaxP);
if (temp1 != 0)
return FALSE;
/* check RxCSR register */
temp1 = 0xffff;
temp1 = ReadOTGReg16(otg_IndexedCSR_RxCSR);
if (temp1 != 0)
return FALSE;
/* check Count0_RxCount register */
// WriteOTGReg8(otg_CommonUSB_Index, 0);
temp1 = 0xffff;
temp1 = ReadOTGReg16(otg_IndexedCSR_Count0);
if (temp1 != 0)
return FALSE;
// WriteOTGReg8(otg_CommonUSB_Index, 1);
// temp1 = 0xffff;
// if (!ReadOTGReg16(otg_IndexedCSR_Count0, &temp1))
// return FALSE;
// if (temp1 != 0)
// return FALSE;
/* check TxType register */
temp = 0xff;
temp = ReadOTGReg8(otg_IndexedCSR_host_TxType);
if (temp != 0)
return FALSE;
/* check NAKLimit0_TxInterval register */
temp = 0xff;
temp = ReadOTGReg8(otg_IndexedCSR_host_NAKLimit0);
if (temp != 0)
return FALSE;
/* check RxType register */
temp = 0xff;
temp = ReadOTGReg8(otg_IndexedCSR_host_RxType);
if (temp != 0)
return FALSE;
/* check RxInterval register */
temp = 0xff;
temp = ReadOTGReg8(otg_IndexedCSR_host_RxInterval);
if (temp != 0)
return FALSE;
/* check ConfigData_FIFOSize register */
// WriteOTGReg8(otg_CommonUSB_Index, 0);
temp = 0xff;
temp = ReadOTGReg8(otg_IndexedCSR_dev_ConfigData);
if (temp != 0x1a)
return FALSE;
// WriteOTGReg8(otg_CommonUSB_Index, 1);
// temp = 0xff;
// if (!ReadOTGReg8(otg_IndexedCSR_dev_ConfigData, &temp))
// return FALSE;
// if (temp != 0xaa)
// return FALSE;
/* check DevCtl register */
temp = 0xff;
temp = ReadOTGReg8(otg_CtrlFIFO_DevCtl);
if (temp != 0x98) /* VBus have been pull up */
return FALSE;
/* check TxFIFOSize register */
temp = 0xff;
temp = ReadOTGReg8(otg_CtrlFIFO_TxFIFOSz);
if (temp != 0)
return FALSE;
/* check RxFIFOSize register */
temp = 0xff;
temp = ReadOTGReg8(otg_CtrlFIFO_RxFIFOSz);
if (temp != 0)
return FALSE;
/* check TxFIFOAddr register */
temp1 = 0xffff;
temp1 = ReadOTGReg16(otg_CtrlFIFO_TxFIFOadd);
if (temp1 != 0)
return FALSE;
/* check RxFIFOAddr register */
temp1 = 0xffff;
temp1 = ReadOTGReg16(otg_CtrlFIFO_RxFIFOadd);
if (temp1 != 0)
return FALSE;
/* check HWVers register */
temp1 = 0xffff;
temp1 = ReadOTGReg16(otg_CtrlFIFO_HWVers);
if (temp1 != 0x0800)
return FALSE;
/* check EPInfo register */
temp = 0xff;
temp = ReadOTGReg8(otg_Config_EPInfo);
if (temp != 0x44)
return FALSE;
/* check RAMInfo register */
temp = 0xff;
temp = ReadOTGReg8(otg_Config_RAMInfo);
if (temp != 0x1c)
return FALSE;
/* check LinkInfo register */
temp = 0xff;
temp = ReadOTGReg8(otg_Config_LinkInfo);
if (temp != 0x5c)
return FALSE;
/* check VPLen register */
temp = 0xff;
temp = ReadOTGReg8(otg_Config_VPLen);
if (temp != 0x3c)
return FALSE;
/* check HS_EOF register */
temp = 0xff;
temp = ReadOTGReg8(otg_Config_HS_EOF);
if (temp != 0x80)
return FALSE;
/* check FS_EOF register */
temp = 0xff;
temp = ReadOTGReg8(otg_Config_FS_EOF);
if (temp != 0x77)
return FALSE;
/* check LS_EOF register */
temp = 0xff;
temp = ReadOTGReg8(otg_Config_LS_EOF);
if (temp != 0x72)
return FALSE;
/* check RqPktCount register */
temp1 = 0xffff;
temp1 = ReadOTGReg16(&otg_RqPktCount[1]);
if (temp1 != 0)
return FALSE;
temp1 = 0xffff;
temp1 = ReadOTGReg16(&otg_RqPktCount[2]);
if (temp1 != 0)
return FALSE;
temp1 = 0xffff;
temp1 = ReadOTGReg16(&otg_RqPktCount[3]);
if (temp1 != 0)
return FALSE;
temp1 = 0xffff;
temp1 = ReadOTGReg16(&otg_RqPktCount[4]);
if (temp1 != 0)
return FALSE;
return TRUE;
}
extern BOOL
IsOTGRegRWOk(VOID)
{
BYTE DATA temp;
WORD DATA temp1;
/* chech FAddr register */
WriteOTGReg8(otg_CommonUSB_FAddr, 0x55);
temp = ReadOTGReg8(otg_CommonUSB_FAddr);
if (temp != 0x55)
return FALSE;
WriteOTGReg8(otg_CommonUSB_FAddr, 0xaa);
temp = ReadOTGReg8(otg_CommonUSB_FAddr);
if (temp != 0x2a)
return FALSE;
//*/
/* chech Power register */
/* peripheral mode */
// ClrBitOTGReg8(&otg->CtrlFIFO.DevCtl, DevCtl_rw_HostReq);
// temp = ReadOTGReg8(&otg->CtrlFIFO.DevCtl);
// if ((temp & DevCtl_r_HostMode) != 0)
// return FALSE;
// SetBitOTGReg8(&otg->CommonUSB.Power, (Power_prw_IsoUpdate | Power_prw_SoftConn | Power_prw_HSEnab | Power_prw_Resume | Power_prw_EnSuspendMode));
// temp = ReadOTGReg8(&otg->CommonUSB->Power);
// if (temp != 0xe5)
// return FALSE;
// ClrBitOTGReg8(&otg->CommonUSB.Power, (Power_prw_IsoUpdate | Power_prw_SoftConn | Power_prw_HSEnab | Power_prw_Resume | Power_prw_EnSuspendMode));
// temp = ReadOTGReg8(&otg->CommonUSB.Power);
// if (temp != 0)
// return FALSE;
/* host mode */
/* if (!SetBitOTGReg8(&otg->CtrlFIFO.DevCtl, DevCtl_rw_HostReq))
return FALSE;
if (!ReadOTGReg8(&otg->CtrlFIFO.DevCtl, &temp))
return FALSE;
if ((temp & DevCtl_r_HostMode) == 0)
return FALSE;
if (!SetBitOTGReg8(&otg->CommonUSB.Power, (Power_hrw_HSEnab | Power_hrw_Reset | Power_hrw_Resume | Power_hs_SuspendMode | Power_hrw_EnSuspendMode)))
return FALSE;
if (!ReadOTGReg8(&otg->CommonUSB.Power, &temp))
return FALSE;
if (temp != 0x2f)
return FALSE;
if (!ClrBitOTGReg8(&otg->CommonUSB.Power, (Power_hrw_HSEnab | Power_hrw_Reset | Power_hrw_Resume | Power_hs_SuspendMode | Power_hrw_EnSuspendMode)))
return FALSE;
if (!ReadOTGReg8(&otg->CommonUSB.Power, &temp))
return FALSE;
if (temp != 0)
return FALSE;
//*/
/* chech IntrTxEn register */
ClrBitOTGReg16(otg_CommonUSB_IntrTxEn, 0x001f);
temp1 = ReadOTGReg16(otg_CommonUSB_IntrTxEn);
if (temp1 != 0)
return FALSE;
SetBitOTGReg16(otg_CommonUSB_IntrTxEn, 0x001f);
temp1 = ReadOTGReg16(otg_CommonUSB_IntrTxEn);
if (temp1 != 0x001f)
return FALSE;
/* chech IntrRxEn register */
ClrBitOTGReg16(otg_CommonUSB_IntrRxEn, 0x001e);
temp1 = ReadOTGReg16(otg_CommonUSB_IntrRxEn);
if (temp1 != 0)
return FALSE;
SetBitOTGReg16(otg_CommonUSB_IntrRxEn, 0x001e);
temp1 = ReadOTGReg16(otg_CommonUSB_IntrRxEn);
if (temp1 != 0x001e)
return FALSE;
/* chech IntrUSBE register */
ClrBitOTGReg8(otg_CommonUSB_IntrUSBE, 0x06);
temp = ReadOTGReg8(otg_CommonUSB_IntrUSBE);
if (temp != 0)
return FALSE;
SetBitOTGReg8(otg_CommonUSB_IntrUSBE, 0x06);
temp = ReadOTGReg8(otg_CommonUSB_IntrUSBE);
if (temp != 0x06)
return FALSE;
/* chech Index register */
WriteOTGReg8(otg_CommonUSB_Index, 4);
temp = ReadOTGReg8(otg_CommonUSB_Index);
if (temp != 4)
return FALSE;
WriteOTGReg8(otg_CommonUSB_Index, 3);
temp = ReadOTGReg8(otg_CommonUSB_Index);
if (temp != 3)
return FALSE;
WriteOTGReg8(otg_CommonUSB_Index, 2);
temp = ReadOTGReg8(otg_CommonUSB_Index);
if (temp != 2)
return FALSE;
WriteOTGReg8(otg_CommonUSB_Index, 1);
temp = ReadOTGReg8(otg_CommonUSB_Index);
if (temp != 1)
return FALSE;
WriteOTGReg8(otg_CommonUSB_Index, 0);
temp = ReadOTGReg8(otg_CommonUSB_Index);
if (temp != 0)
return FALSE;
/* chech TestMode register */
WriteOTGReg8(otg_CommonUSB_TestMode, 0xFF);
temp = ReadOTGReg8(otg_CommonUSB_TestMode);
if (temp != 0xBF)
return FALSE;
WriteOTGReg8(otg_CommonUSB_TestMode, 0);
temp = ReadOTGReg8(otg_CommonUSB_TestMode);
if (temp != 0)
return FALSE;
/* chech TxMaxP register */
WriteOTGReg8(otg_CommonUSB_Index, 1);
WriteOTGReg16(otg_IndexedCSR_TxMaxP, 64);
temp1 = ReadOTGReg16(otg_IndexedCSR_TxMaxP);
if (temp1 != 64)
return FALSE;
WriteOTGReg16(otg_IndexedCSR_TxMaxP, 512);
temp1 = ReadOTGReg16(otg_IndexedCSR_TxMaxP);
if (temp1 != 512)
return FALSE;
WriteOTGReg16(otg_IndexedCSR_TxMaxP, 0);
temp1 = ReadOTGReg16(otg_IndexedCSR_TxMaxP);
if (temp1 != 0)
return FALSE;
WriteOTGReg8(otg_CommonUSB_Index, 0);
/* chech CSR0 register */
WriteOTGReg8(otg_CommonUSB_Index, 0);
SetBitOTGReg16(otg_IndexedCSR_CSR0, (CSR0_ps_FlushFIFO | CSR0_ps_ServicedSetupEnd | CSR0_ps_ServicedRxPktRdy | CSR0_ps_SendStall | CSR0_ps_DataEnd | CSR0_prs_TxPktRdy));
temp1 = ReadOTGReg16(otg_IndexedCSR_CSR0);
if (temp1 != 0x002A)
return FALSE;
/* chech TxCSR register */
WriteOTGReg8(otg_CommonUSB_Index, 1);
SetBitOTGReg16(otg_IndexedCSR_TxCSR, (TxCSR_prw_AutoSet | TxCSR_prw_ISO | TxCSR_prw_Mode | TxCSR_prw_DMAReqEnab | TxCSR_prw_FrcDataTog | TxCSR_prw_DMAReqMode | TxCSR_ps_ClrDataTog | TxCSR_prw_SendStall | TxCSR_ps_FlushFIFO | TxCSR_prs_TxPktRdy));
temp1 = ReadOTGReg16(otg_IndexedCSR_TxCSR);
if (temp1 != 0xFC10)
return FALSE;
ClrBitOTGReg16(otg_IndexedCSR_TxCSR, (TxCSR_prw_AutoSet | TxCSR_prw_ISO | TxCSR_prw_Mode | TxCSR_prw_DMAReqEnab | TxCSR_prw_FrcDataTog | TxCSR_prw_DMAReqMode | TxCSR_ps_ClrDataTog | TxCSR_prw_SendStall | TxCSR_ps_FlushFIFO | TxCSR_prs_TxPktRdy | TxCSR_prc_IncompTx | TxCSR_prc_SentStall | TxCSR_prc_UnderRun | TxCSR_prc_FIFONotEmpty));
temp1 = ReadOTGReg16(otg_IndexedCSR_TxCSR);
if (temp1 != 0)
return FALSE;
WriteOTGReg8(otg_CommonUSB_Index, 0);
/* check RxMaxP register */
WriteOTGReg8(otg_CommonUSB_Index, 1);
WriteOTGReg16(otg_IndexedCSR_RxMaxP, 64);
temp1 = ReadOTGReg16(otg_IndexedCSR_RxMaxP);
if (temp1 != 64)
return FALSE;
WriteOTGReg16(otg_IndexedCSR_RxMaxP, 512);
temp1 = ReadOTGReg16(otg_IndexedCSR_RxMaxP);
if (temp1 != 512)
return FALSE;
WriteOTGReg16(otg_IndexedCSR_RxMaxP, 0);
temp1 = ReadOTGReg16(otg_IndexedCSR_RxMaxP);
if (temp1 != 0)
return FALSE;
WriteOTGReg8(otg_CommonUSB_Index, 0);
/* check RxCSR register */
WriteOTGReg8(otg_CommonUSB_Index, 1);
SetBitOTGReg16(otg_IndexedCSR_RxCSR, (RxCSR_prw_AutoClear | RxCSR_prw_ISO | RxCSR_prw_DMAReqEnab | RxCSR_prw_DisNyet_pr_PIDError | RxCSR_prw_DMAReqMode | RxCSR_ps_ClrDataTog | RxCSR_prw_SendStall | RxCSR_ps_FlushFIFO));
temp1 = ReadOTGReg16(otg_IndexedCSR_RxCSR);
if (temp1 != 0xE820)
return FALSE;
ClrBitOTGReg16(otg_IndexedCSR_RxCSR, (RxCSR_prw_AutoClear | RxCSR_prw_ISO | RxCSR_prw_DMAReqEnab | RxCSR_prw_DisNyet_pr_PIDError | RxCSR_prw_DMAReqMode | RxCSR_ps_ClrDataTog | RxCSR_prw_SendStall | RxCSR_ps_FlushFIFO | RxCSR_prc_IncompRx | RxCSR_prc_SentStall | RxCSR_prc_OverRun | RxCSR_prc_RxPktRdy));
temp1 = ReadOTGReg16(otg_IndexedCSR_RxCSR);
if (temp1 != 0)
return FALSE;
WriteOTGReg8(otg_CommonUSB_Index, 0);
/* check DevCtl register */
// SetBitOTGReg8(&otg->CtrlFIFO.DevCtl, (DevCtl_rw_HostReq | DevCtl_rw_Session));
// temp = ReadOTGReg8(&otg->CtrlFIFO.DevCtl);
// if (temp != 0x82 && temp != 0x83)
// return FALSE;
// ClrBitOTGReg8(&otg->CtrlFIFO.DevCtl, (DevCtl_rw_HostReq | DevCtl_rw_Session));
// temp = ReadOTGReg8(&otg->CtrlFIFO.DevCtl);
// if (temp != 0x80)
// return FALSE;
/* check LinkInfo register */ //???
WriteOTGReg8(otg_Config_LinkInfo, 0xFF);
temp = ReadOTGReg8(otg_Config_LinkInfo);
if (temp != 0xFF)
return FALSE;
WriteOTGReg8(otg_Config_LinkInfo, 0);
temp = ReadOTGReg8(otg_Config_LinkInfo);
if (temp != 0)
return FALSE;
WriteOTGReg8(otg_Config_LinkInfo, 0x5C);
temp = ReadOTGReg8(otg_Config_LinkInfo);
if (temp != 0x5C)
return FALSE;
/* check VPLen register */
WriteOTGReg8(otg_Config_VPLen, 0xFF);
temp = ReadOTGReg8(otg_Config_VPLen);
if (temp != 0xFF)
return FALSE;
WriteOTGReg8(otg_Config_VPLen, 0);
temp = ReadOTGReg8(otg_Config_VPLen);
if (temp != 0)
return FALSE;
WriteOTGReg8(otg_Config_VPLen, 0x3C);
temp = ReadOTGReg8(otg_Config_VPLen);
if (temp != 0x3C)
return FALSE;
/* check HS_EOF register */
WriteOTGReg8(otg_Config_HS_EOF, 0xFF);
temp = ReadOTGReg8(otg_Config_HS_EOF);
if (temp != 0xFF)
return FALSE;
WriteOTGReg8(otg_Config_HS_EOF, 0);
temp = ReadOTGReg8(otg_Config_HS_EOF);
if (temp != 0)
return FALSE;
WriteOTGReg8(otg_Config_HS_EOF, 0x80);
temp = ReadOTGReg8(otg_Config_HS_EOF);
if (temp != 0x80)
return FALSE;
/* check FS_EOF register */
WriteOTGReg8(otg_Config_FS_EOF, 0xFF);
temp = ReadOTGReg8(otg_Config_FS_EOF);
if (temp != 0xFF)
return FALSE;
WriteOTGReg8(otg_Config_FS_EOF, 0);
temp = ReadOTGReg8(otg_Config_FS_EOF);
if (temp != 0)
return FALSE;
WriteOTGReg8(otg_Config_FS_EOF, 0x77);
temp = ReadOTGReg8(otg_Config_FS_EOF);
if (temp != 0x77)
return FALSE;
/* check LS_EOF register */
WriteOTGReg8(otg_Config_LS_EOF, 0xFF);
temp = ReadOTGReg8(otg_Config_LS_EOF);
if (temp != 0xFF)
return FALSE;
WriteOTGReg8(otg_Config_LS_EOF, 0);
temp = ReadOTGReg8(otg_Config_LS_EOF);
if (temp != 0)
return FALSE;
WriteOTGReg8(otg_Config_LS_EOF, 0x72);
temp = ReadOTGReg8(otg_Config_LS_EOF);
if (temp != 0x72)
return FALSE;
return TRUE;
}
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