xlli_lowlev_mac.mac

Intel PXA270底层设备驱动代码

        ; Disable UART and disable interrupts
        ldr $temp, =0x0
        str $temp, [$BaseAddress, #xlli_uart_lcr_offset] ; (DLAB OFF)
        str $temp, [$BaseAddress, #xlli_uart_dlh_offset] ; IER_DLH = 0x0

        ; Set baud rate divisor
        ldr $temp, =0x80
        str $temp, [$BaseAddress, #xlli_uart_lcr_offset] ; (DLAB ON)
        ;ldr $temp, =0x8                                  ; 115200 Baud divisor
        ldr $temp, =0x18                                 ; 38500 Baud divisor
        str $temp, [$BaseAddress]                        ; THR_RBR_DLL = 0x18
        ldr $temp, =0x0
        str $temp, [$BaseAddress, #xlli_uart_dlh_offset] ; IER_DLH = 0x0

        ; Set communications parameters to 8,N,1
        ldr $temp, =0x0
        str $temp, [$BaseAddress, #xlli_uart_lcr_offset] ; (DLAB OFF)
        ldr $temp, =0x3
        str $temp, [$BaseAddress, #xlli_uart_lcr_offset] ; LCR = 0x3

        ; Clear and enable fifos
        ldr $temp, =0x7
        str $temp, [$BaseAddress, #xlli_uart_fcr_offset] ; IIR_FCR = 0x8

        ; Set polled mode
        ldr $temp, =0x0
        str $temp, [$BaseAddress, #xlli_uart_dlh_offset] ; IER_DLH = 0x0

        ; Set normal UART mode
        ldr $temp, =0x0
        str $temp, [$BaseAddress, #xlli_uart_mcr_offset] ; MCR = 0

        ; Enable UART
        ldr $temp, [$BaseAddress, #xlli_uart_dlh_offset] ; $temp = IER_DLH
        orr $temp, $temp, #0x40                          ; Set the enable uart bit
        str $temp, [$BaseAddress, #xlli_uart_ier_offset] ;
    MEND


;*********************************************************************************
;
; **************************************************
; **********                              **********
; **********        xlli_PrintString      **********
; **********                              **********
; **************************************************
;
;      This macro writes the string pointed to by $pSTr until a '0' is reached.
;
;  Notes:
;      None
;
   MACRO
   xlli_PrintString $BaseAddress, $pStr, $temp1
11
        ldrb    $temp1, [$pStr]                 ; load the first byte
        cmp     $temp1, #0                      ; is it NULL?
        beq     %FT21                           ; if so, let's end now (search forward, this macro only)

        xlli_IsTBE   $BaseAddress, $temp1       ; ensure TBE
        ldrb         $temp1, [$pStr]            ; load the first byte (agin, for now... really need another register)

        strb    $temp1, [$BaseAddress]          ; transmit a byte
        add     $pStr, $pStr, #1                ;  and increment the byte pointer
        b       %BT11                           ; otherwise, keep looping (search backwards, this macro only)
21
    MEND

;*********************************************************************************
;
; **************************************************
; **********                              **********
; **********          xlli_PrintReg       **********
; **********                              **********
; **************************************************
;
;      This macro prints a 32-bit register to the UART.  It does ASCII conversion.
;
;  Notes:
;      None
;
   MACRO
   xlli_PrintReg $BaseAddress, $Reg, $temp1, $temp2, $temp3

        ; First, must convert register to ASCII
        ;
        mov     $temp1, #28                             ; n = 28
99
        mov     $temp2, $Reg LSR $temp1                 ; $temp2 = $Reg >> n
        and     $temp2, $temp2, #0xF                    ; mask off irrelevant bits
        cmp     $temp2, #0x0000000A                     ; if r1 < 0xA
        addlt   $temp3, $temp2, #0x30                   ; $temp3 = ($temp2 + 0x30)  {0x0 -> 0x9}
        addge   $temp3, $temp2, #0x37                   ; $temp3 = ($temp2 + 0x37)  {0xA -> 0xF)

        ; Now just dump the char just converted
        ;
        xlli_IsTBE   $BaseAddress, $temp2               ; ensure TBE
        strb         $temp3, [$BaseAddress]             ; transmit

        subs    $temp1, $temp1, #4                      ; n=n-4
        bne     %BT99

        ; 0th Iteration
        ;
        mov     $temp2, $Reg                            ; $temp2 = $reg (no need to shift for the LSN)
        and     $temp2, $temp2, #0xF                    ; mask off irrelevant bits
        cmp     $temp2, #0x0000000A                     ; if r1 < 0xA
        addlt   $temp3, $temp2, #0x30                   ; $temp3 = ($temp2 + 0x30)  {0x0 -> 0x9}
        addge   $temp3, $temp2, #0x37                   ; $temp3 = ($temp2 + 0x37)  [0xA -> 0xF)

        ; dump the char i just converted
        ;
        xlli_IsTBE   $BaseAddress, $temp2               ; ensure TBE
        strb         $temp3, [$BaseAddress]             ; transmit

        ; Add cr/lf
        ;
        mov          $temp1, #0x0A
        xlli_IsTBE   $BaseAddress, $temp2               ; ensure TBE
        strb         $temp1, [$BaseAddress]             ; transmit  (LF)

    MEND

;*********************************************************************************
;
; **************************************************
; **********                              **********
; **********          xlli_IsTBE          **********
; **********                              **********
; **************************************************
;
;      This macro spins until the UART.LSR.TEMT gets set, indicating it is ready for data
;
;  Notes:
;      None
;
   MACRO
   xlli_IsTBE $BaseAddress, $temp1

50
    ldr  $temp1, [$BaseAddress, #xlli_uart_lsr_offset]
    ands $temp1, $temp1, #0x40          ; mask all but bit 6, and set Z if result=0 (i.e. if bit not set)
    beq  %BT50

    MEND






;*********************************************************************************
;
; **************************************************
; **********                              **********
; **********      xlli_Zero_SDRAM         **********
; **********                              **********
; **************************************************
;
; * Params: $StartAdx: 32-bit aligned start address.
; *         $NumMB   : Number of MB to clear.
; *         $gp1,2   : general purpose scratch
; *
; * Returns: nothing
; *
; * Effects: corrupts $gp1,2
; *
; *  This macro simply zeros out RAM, ending at $StartAdx, and
; *  starting at ($StartAdx + ($NumMB*0x100000)), inclusive.  It is the resposibility of the
; *  caller to ensure that the addresses are valid!  Ensure $StartAdx
; *  is 32-bit aligned, or the math will be wrong.
; *
; Ex:
;    ldr r0, =0xA0000000     ; start Adx
;    mov r1, #64             ; #MB
;
;    Zero_SDRAM r0, r1, r2, r3
;
;
   MACRO
   xlli_Zero_SDRAM $StartAdx, $NumMB, $gp1, $gp2
    ;
    ; Determine ending address: endAdx = (($NumMB * 0x0010 0000) + $StartAdx)
    ;
    mov     $gp1, #0x100000
    mla     $gp2, $NumMB, $gp1, $StartAdx

    ldr     $gp1, =0x00000000           ; source data
10
    sub     $gp2, $gp2, #4              ; word pre-decrement

    str     $gp1, [$gp2]                ; 32-bit zero fill
    cmp     $gp2, $StartAdx
    bne     %BT10

    MEND




;*********************************************************************************
;
; **************************************************
; **********                              **********
; **********   xlli_SCRUB_SDRAM_TUNED_64  **********
; **********                              **********
; **************************************************
;
; * Params: $StartAdx: 32-bit aligned start address.
; *         $gp1,2   : general purpose scratch
; *
; * Returns: nothing
; *
; * Effects: corrupts $gp1-6
; *
; *  This macro simply zeros out 64MB of RAM starting at $StartAdx.
; *  It is the resposibility of the caller to ensure that the addresses
; *  are valid!  Ensure $StartAdx is 32-bit aligned, or the math will be
; *  wrong.
; *
; Ex:
;    ldr r0, =0xA0000000     ; start Adx
;
;    Zero_SDRAM_Tuned_64MB r0, r1, r2, r3, r4, r5, r6
;
   MACRO
   xlli_SCRUB_SDRAM_TUNED_64 $StartAdx, $gp1, $gp2, $gp3, $gp4, $gp5, $gp6

    mov    $gp6, #0                ; data
    mov    $gp1, $StartAdx
    add    $gp2, $StartAdx, #0x4
    add    $gp3, $StartAdx, #0x8
    add    $gp4, $StartAdx, #0xC

    mov    $gp5, #0x04000000       ; loop counter = 64 MB

10
    str    $gp6, [$gp1], #+16
    str    $gp6, [$gp2], #+16
    str    $gp6, [$gp3], #+16
    str    $gp6, [$gp4], #+16

    subs   $gp5, $gp5, #16
    bne    %BT10

    str    $gp6, [$gp1]            ; get last word

    MEND



;*********************************************************************************
;*********************************************************************************
    END