s1d13xxxfb.c

linux下的VIDEO接口驱动程序

//----------------------------------------------------------------------------- 
static int s1d13xxx_encode_var(struct fb_var_screeninfo *var, const void *fb_par,
                struct fb_info_gen *info)
    { 
    memset(var, 0, sizeof(struct fb_var_screeninfo));

    var->xres =  S1D_DISPLAY_WIDTH;     //visible resolution
    var->yres =  S1D_DISPLAY_HEIGHT;

    var->xres_virtual = var->xres;
    var->yres_virtual = var->yres;
    var->xoffset = var->yoffset = 0;
    var->bits_per_pixel = S1D_DISPLAY_BPP;
    var->grayscale = 0;
    var->nonstd = 0;                 /* != 0 Non standard pixel format */
    var->activate = FB_ACTIVATE_NOW; /* see FB_ACTIVATE_*              */
    var->height = -1;                /* height of picture in mm        */
    var->width  = -1;                /* width of picture in mm         */
    var->accel_flags = 0;            /* acceleration flags (hints      */
    var->pixclock = S1D_DISPLAY_PCLK;
    var->right_margin = 0;
    var->lower_margin = 0;
    var->hsync_len = 0;
    var->vsync_len = 0;
    var->left_margin = 0;
    var->upper_margin = 0;
    var->sync = 0;
    var->vmode = FB_VMODE_INTERLACED;//FB_VMODE_NONINTERLACED;

#ifdef FBCON_HAS_CFB4 
    var->red.offset = 0;
    var->red.length = 8;
    var->green.offset = 0;
    var->green.length = 8;
    var->blue.offset = 0;
    var->blue.length = 8;
#endif

#ifdef FBCON_HAS_CFB8 
    var->red.offset = 0;
    var->red.length = 8;
    var->green.offset = 0;
    var->green.length = 8;
    var->blue.offset = 0;
    var->blue.length = 8;
#endif

#ifdef FBCON_HAS_CFB16  // RGB 565
    var->red.offset = 11;
    var->red.length = 5;
    var->green.offset = 5;
    var->green.length = 6;
    var->blue.offset = 0;
    var->blue.length = 5;
#endif

    var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
    var->transp.offset = var->transp.length = var->transp.msb_right = 0;

    return 0; 
    } 
 
//----------------------------------------------------------------------------- 
//
// Set the 'par' according to hardware
//
//----------------------------------------------------------------------------- 
static void s1d13xxx_get_par(void *fb_par, struct fb_info_gen *info) 
    { 
    } 
 
//----------------------------------------------------------------------------- 
//
// Set the hardware according to 'par'. 
//
//----------------------------------------------------------------------------- 
static void s1d13xxx_set_par(const void *fb_par, struct fb_info_gen *info)
    { 
    } 
 
//----------------------------------------------------------------------------- 
// 
// Read a single color register and split it into colors/transparent.  
// The return values must have a 16 bit magnitude.  
// Return != 0 for invalid regno.  
// 
//----------------------------------------------------------------------------- 
static int s1d13xxx_getcolreg(unsigned regno, unsigned *red, unsigned *green, 
                unsigned *blue, unsigned *transp, struct fb_info *info) 
    { 
    u32 r,g,b;

    if (regno >= S1D_PALETTE_SIZE) 
        return 1; 

    S1D_READ_PALETTE(fb_info.RegAddr,regno,r,g,b);  

    *red    = (r << 8) | r; 
    *green  = (g << 8) | g; 
    *blue   = (b << 8) | b; 
    *transp = 0; 
    return 0; 
    } 
 
//---------------------------------------------------------------------------- 
// 
// Set a single color register. The values supplied have a 16 bit  
// magnitude.  
// Return != 0 for invalid regno.  
//
// We get called even if we specified that we don't have a programmable palette
// or in direct/true color modes!
//---------------------------------------------------------------------------- 
static int s1d13xxx_setcolreg(unsigned regno, unsigned red, unsigned green,
                unsigned blue, unsigned transp, struct fb_info *info) 
    { 
	    //	    printk("S1D13XXX: (setcolreg) i:%d r=%x g=%x b=%x\n", regno,red,green,blue);

    if (regno >= S1D_PALETTE_SIZE) 
        return 1; 
    //#if !defined(FBCON_HAS_CFB16) 
    S1D_WRITE_PALETTE(fb_info.RegAddr,regno,red>>8,green>>8,blue>>8); 
    //#endif
#if defined(FBCON_HAS_CFB16) 
    // Make the first 16 colors of the palette available to fbcon 

    if (regno < 16) 
        {
        fb_info.cfb16[regno] = 
            (red & 0xf800)|((green & 0xfc00) >> 5)|((blue & 0xf800) >> 11); 
        }
#endif
    return 0; 
    } 
 
//-----------------------------------------------------------------------------
// 
// Pan (or wrap, depending on the `vmode' field) the display using the 
// `xoffset' and `yoffset' fields of the `var' structure. 
// If the values don't fit, return -EINVAL. 
// 
//-----------------------------------------------------------------------------
static int s1d13xxx_pan_display(const struct fb_var_screeninfo *var, 
                struct fb_info_gen *info) 
    { 
    return 0; 
    } 
 
//-----------------------------------------------------------------------------
//     
// Blank the screen if blank_mode != 0, else unblank. If blank == NULL  
// then the caller blanks by setting the CLUT (Color Look Up Table) to all  
// black. Return 0 if blanking succeeded, != 0 if un-/blanking failed due  
// to e.g. a video mode which doesn't support it. Implements VESA suspend  
// and powerdown modes on hardware that supports disabling hsync/vsync:  
//     
// 0 = unblank 
// 1 = blank 
// 2 = suspend vsync 
// 3 = suspend hsync 
// 4 = off 
//
//----------------------------------------------------------------------------- 
static int s1d13xxx_blank(int blank_mode, struct fb_info_gen *info)
    { 
	    return 0; 
    } 
 
//----------------------------------------------------------------------------- 
//
// Fill in a pointer with the virtual address of the mapped frame buffer.  
// Fill in a pointer to appropriate low level text console operations (and  
// optionally a pointer to help data) for the video mode `par' of your  
// video hardware. These can be generic software routines, or hardware  
// accelerated routines specifically tailored for your hardware.  
// If you don't have any appropriate operations, you must fill in a  
// pointer to dummy operations, and there will be no text output.  
//
//----------------------------------------------------------------------------- 
static void s1d13xxx_set_disp(const void *par, struct display *disp,
                struct fb_info_gen *info)
    { 
   disp->screen_base = fb_info.VmemAddr;

#ifdef FBCON_HAS_CFB4
    disp->dispsw = &fbcon_cfb4;
#endif

#ifdef FBCON_HAS_CFB8
    disp->dispsw = &fbcon_cfb8;
#endif

#ifdef FBCON_HAS_CFB16
    disp->dispsw = &fbcon_cfb16;
    disp->dispsw_data = fb_info.cfb16;  /* console palette */
#endif

    disp->scrollmode = SCROLL_YREDRAW;
    } 

void __init
s1d13xxxdelayms(int ms)
    {
    int i;
    for (i = 0; i < ms; i++)
        {
        udelay(1000);
        }
    } 
 
//----------------------------------------------------------------------------- 
//
// Initialize the chip and the frame buffer driver. 
//
//----------------------------------------------------------------------------- 

#ifdef CONFIG_FBCON_EPSON_S1D13806_AT91RM9200DK
void plateform_init_video(void)
{
		
	// NWAIT Signal
	AT91_SYS->PIOC_ASR = AT91C_PC6_NWAIT;
       	AT91_SYS->PIOC_BSR = 0;
 	AT91_SYS->PIOC_PDR = AT91C_PC6_NWAIT;




     		AT91_SYS->PIOC_PER |= 0x00004000;	
		 		AT91_SYS->PIOC_OER |= 0x00004000;	
	   		AT91_SYS->PIOC_SODR |= 0x00004000;




	// Initialization of the Static Memory Controller for Chip Select 2
	AT91_SYS->EBI_SMC2_CSR[2] = (AT91C_SMC2_NWS & 0x4) | AT91C_SMC2_WSEN | 
		(AT91C_SMC2_TDF & 0x100) | AT91C_SMC2_DBW;
}
#endif //CONFIG_FBCON_EPSON_S1D13806_AT91RM9200DK


int __init s1d13xxxfb_init(char *dummy)
{
  int i;
  S1D_INDEX s1dReg;
  S1D_VALUE s1dValue;
  
  plateform_init_video();
  
  if (!request_mem_region(S1D_PHYSICAL_REG_ADDR,S1D_PHYSICAL_REG_SIZE, "EpsonFB_RG"))
    printk("Error request mem \n");
  if (!request_mem_region(S1D_PHYSICAL_VMEM_ADDR,S1D_PHYSICAL_VMEM_SIZE, "EpsonFB"))
    printk("Error request mem \n");
  
  fb_info.RegAddr  = (unsigned char*) ioremap_nocache(S1D_PHYSICAL_REG_ADDR,S1D_PHYSICAL_REG_SIZE); 
  fb_info.VmemAddr = (unsigned char*) ioremap_nocache(S1D_PHYSICAL_VMEM_ADDR,S1D_PHYSICAL_VMEM_SIZE); 
  printk("S1D13XXX: Phys address:%X Phys Reg address:%X  \n", fb_info.VmemAddr,fb_info.RegAddr);//@@GC
  
  if (!fb_info.VmemAddr || !fb_info.RegAddr)  
    { 
      printk("s1d13xxx_init: ioremap() returned NULL\n"); 
    }  
  
  for (i = 0; i < sizeof(aS1DRegs)/sizeof(aS1DRegs[0]); i++)
    {
      s1dReg = aS1DRegs[i].Index; 
      s1dValue = aS1DRegs[i].Value; 
      if (s1dReg == S1D_REGDELAYOFF || s1dReg == S1D_REGDELAYON)
	s1d13xxxdelayms((int)s1dValue);
      else
	{
	  ((S1D_VALUE*)fb_info.RegAddr)[s1dReg/sizeof(S1D_VALUE)] = s1dValue; 
	}
    } 
  local_s1d13xxxfb_open();
  strcpy(fb_info.gen.info.modename, "s1d13xxx"); 
  fb_info.gen.info.changevar = NULL; 
  fb_info.gen.info.node = -1; 
  fb_info.gen.info.fbops = &s1d13xxxfb_ops; 
  fb_info.gen.info.disp = &disp; 
  
  fb_info.gen.info.switch_con = &fbgen_switch;
  fb_info.gen.info.updatevar = &fbgen_update_var;
  fb_info.gen.info.blank = &fbgen_blank;
  
  strcpy(fb_info.gen.info.fontname, default_fontname);
  fb_info.gen.parsize = 0;
  fb_info.gen.info.flags = FBINFO_FLAG_DEFAULT; 
  fb_info.gen.fbhw = &s1d13xxx_hwswitch; 
  fb_info.gen.fbhw->detect(); 
  
  fbgen_get_var(&disp.var, -1, &fb_info.gen.info); 
  disp.var.activate = FB_ACTIVATE_NOW;
  fbgen_do_set_var(&disp.var, 1, &fb_info.gen); 
  fbgen_set_disp(-1, &fb_info.gen); 
  fbgen_install_cmap(0, &fb_info.gen); 
  
  if (register_framebuffer(&fb_info.gen.info) < 0) {
    return -EINVAL;
  }
  printk("fb%d: %s frame buffer device\n", GET_FB_IDX(fb_info.gen.info.node), 
	 fb_info.gen.info.modename); 
  
  printk("Display %d x %d %dBpp\n", 
	 S1D_DISPLAY_WIDTH,S1D_DISPLAY_HEIGHT,S1D_DISPLAY_BPP); 
  
  return 0;
} 

//----------------------------------------------------------------------------- 
//
// Initialization of the Clock Generator ICS1523
//
//----------------------------------------------------------------------------- 
int local_s1d13xxxfb_open(void)//struct fb_info *info, int user) 
{ 
  int 			ack,nb_trial,error_status ;
  unsigned int            status = 0xffffffff;
  AT91PS_TWI              p_twi = AT91C_VA_BASE_TWI;
  
  error_status = (int) ICS1523_ACCESS_OK ;
/*  
  // Configure TWI PIOs
  AT91_SYS->PIOA_ASR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
  AT91_SYS->PIOA_BSR = 0;
  AT91_SYS->PIOA_PDR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
  
  // Configure the multi-drive option for TWD
  AT91_SYS->PIOA_MDDR = ~AT91C_PA25_TWD;
  AT91_SYS->PIOA_MDER = AT91C_PA25_TWD;
  
  // Configure PMC by enabling TWI clock
  AT91_SYS->PMC_PCER = ((unsigned int) 1 << AT91C_ID_TWI);
  
  // Configure TWI in master mode
  // Disable interrupts
  p_twi->TWI_IDR = (unsigned int) -1;
  
  // Reset peripheral
  p_twi->TWI_CR = AT91C_TWI_SWRST;
  
  // Set Master mode
  p_twi->TWI_CR = AT91C_TWI_MSEN | AT91C_TWI_SVDIS;
  
  // Set TWI Clock Waveform Generator Register	
  AT91F_SetTwiClock(60000);	// MCK in KHz = 60000 KHz
  
  // ICS1523 Initialisation
  ack = AT91F_ICS1523_WriteByte ( ( unsigned char ) ICS_ICR, ( unsigned char ) 0 ) ;
  error_status |= ack ;
  ack = AT91F_ICS1523_WriteByte ( ( unsigned char ) ICS_OE, ( unsigned char ) (ICS_OEF | ICS_OET2 | ICS_OETCK) ) ;
  error_status |= ack ;
  ack = AT91F_ICS1523_WriteByte ( ( unsigned char ) ICS_OD, ( unsigned char ) (ICS_INSEL | 0x7F) );
  error_status |= ack ;
  ack = AT91F_ICS1523_WriteByte ( ( unsigned char ) ICS_DPAO, ( unsigned char ) 0 ) ;
  error_status |= ack ;
  
  nb_trial = 0 ;
  do
    {
      nb_trial++ ;
      ack = AT91F_ICS1523_WriteByte ( ( unsigned char ) ICS_ICR, ( unsigned char ) (ICS_ENDLS | ICS_ENPLS | ICS_PDEN | ICS_FUNCSEL) ) ;
      error_status |= ack ;
      ack = AT91F_ICS1523_WriteByte ( ( unsigned char ) ICS_LCR, ( unsigned char ) (ICS_PSD | ICS_PFD) ) ;
      error_status |= ack ;
      ack = AT91F_ICS1523_WriteByte ( ( unsigned char ) ICS_FD0, ( unsigned char ) 0x7A ) ;
      error_status |= ack ;
      ack = AT91F_ICS1523_WriteByte ( ( unsigned char ) ICS_FD1, ( unsigned char ) 0x00 ) ;
      error_status |= ack ;
      ack = AT91F_ICS1523_WriteByte ( ( unsigned char ) ICS_SWRST, ( unsigned char ) (ICS_PLLR) ) ;
      error_status |= ack ;
      
      // Program 1ms temporizing period
      mdelay(1);
      
      AT91F_ICS1523_ReadByte ( ( unsigned char ) ICS_SR, (char *)&status ) ;
    } while ( !( ( unsigned int ) status & ( unsigned int ) ICS_PLLLOCK ) && ( nb_trial < 10 ) ) ;
  
  ack = AT91F_ICS1523_WriteByte ( ( unsigned char ) ICS_DPAC, ( unsigned char ) 0x01 ) ;
  error_status |= ack ;
  ack = AT91F_ICS1523_WriteByte ( ( unsigned char ) ICS_SWRST, ( unsigned char ) ( ICS_DPAR ) ) ;
  error_status |= ack ;
  
  //* Program 1ms temporizing period
  mdelay(1);
  
  ack = AT91F_ICS1523_WriteByte ( ( unsigned char ) ICS_DPAO, ( unsigned char ) 0x00 ) ;
  error_status |= ack ;
  */
  return ( error_status ) ;
} 

//----------------------------------------------------------------------------- 
//
// Parse user speficied options (`video=s1d13xxxfb:')  
//
//----------------------------------------------------------------------------- 
int __init
s1d13xxxfb_setup(char *options, int *ints) 
    { 
	    if (options!=NULL)
		    printk("s1d13xxxfb_setup options: %s",options);
    return 0;
    }
 
/* ------------------------------------------------------------------------- */ 

    /* 
     *  Modularization 
     */ 
#ifdef MODULE 
int init_module(void) 
    { 
	    s1d13xxxfb_init(); //check
    return 0; 
    } 
 
void cleanup_module(void) 
    { 
    unregister_framebuffer(&fb_info.gen.info); 
    } 
#endif