init301.c

linux下的VIDEO接口驱动程序

/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/init301.c,v 1.3 2000/12/02 01:16:16 dawes Exp $ */

/*
 * Mode switching code (CRT2 section) for SiS 300/540/630/730/315/550/650/740
 * (Universal module for Linux kernel framebuffer, XFree86 4.x)
 *
 * Comments and changes marked with "TW" by Thomas Winischhofer <[e-mail]>
 *
 */

/* DEBUG: GetVCLK2Ptr (Mitac bug) - reverted */

/*
#ifdef WINCE_HEADER
#include "precomp.h"
#endif
*/
/*#include "precomp.h"*/

#include "init301.h"
#ifdef SIS300
#include "oem300.h"
#endif
#ifdef SIS315H
#include "oem310.h"
#endif

BOOLEAN
SiS_SetCRT2Group301(USHORT BaseAddr,ULONG ROMAddr,USHORT ModeNo,
                    PSIS_HW_DEVICE_INFO HwDeviceExtension)
{
   USHORT ModeIdIndex;
   USHORT RefreshRateTableIndex;

   SiS_SetFlag=SiS_SetFlag|ProgrammingCRT2;
   SiS_SearchModeID(ROMAddr,ModeNo,&ModeIdIndex);
   SiS_SelectCRT2Rate=4;
   RefreshRateTableIndex = SiS_GetRatePtrCRT2(ROMAddr,ModeNo,ModeIdIndex);
   SiS_SaveCRT2Info(ModeNo);
   SiS_DisableBridge(HwDeviceExtension,BaseAddr);
   SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
   SiS_SetCRT2ModeRegs(BaseAddr,ModeNo,HwDeviceExtension);
   if(SiS_VBInfo&DisableCRT2Display) {
     SiS_LockCRT2(HwDeviceExtension, BaseAddr);
     SiS_DisplayOn();
     return(FALSE);
   }
   /* SetDefCRT2ExtRegs(BaseAddr);   */
   SiS_GetCRT2Data(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex);
   /*301b*/
   if( ((SiS_VBType&(VB_SIS301B|VB_SIS302B|VB_SIS301LV|VB_SIS301LV))
           && (SiS_VBInfo&SetCRT2ToLCDA)) ){
	SiS_GetLVDSDesData(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex);
   }
   /*end 301b*/
   if(SiS_IF_DEF_LVDS==1) {
   	SiS_GetLVDSDesData(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex);
   }

   SiS_SetGroup1(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
                 HwDeviceExtension,RefreshRateTableIndex);

   /*301b*/
   if( (SiS_VBType&(VB_SIS301B|VB_SIS302B|VB_SIS301LV|VB_SIS301LV))
   		&& (SiS_VBInfo&SetCRT2ToLCDA)
		&& (SiS_IF_DEF_LVDS == 0) ) {
     	if( (SiS_VBType&(VB_SIS301LV|VB_SIS302LV)) && (SiS_VBInfo&SetCRT2ToLCDA) ){
             	SiS_SetReg1(SiS_Part4Port,0x24,0x0e);
    	}
   /* end 301b */
   } else if((SiS_IF_DEF_LVDS==0) && (!(SiS_VBInfo&SetCRT2ToLCDA))) {
      	SiS_SetGroup2(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
	              RefreshRateTableIndex,HwDeviceExtension);
      	SiS_SetGroup3(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
	              HwDeviceExtension);
      	SiS_SetGroup4(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
	              RefreshRateTableIndex,HwDeviceExtension);
      	SiS_SetGroup5(BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
   } else {
     	if(SiS_IF_DEF_CH7005==1) {
	    if(SiS_VBInfo&SetCRT2ToTV)
	        /* TW: Set Chrontel registers only if CRT2 is TV */
       		SiS_SetCHTVReg(ROMAddr,ModeNo,ModeIdIndex,
		               RefreshRateTableIndex);
     	}
     	if(!(SiS_LCDResInfo==Panel640x480)){
    	 	SiS_ModCRT1CRTC(ROMAddr,ModeNo,ModeIdIndex,
		                RefreshRateTableIndex);
         	if(!SiS_IF_DEF_FSTN)  /*fstn*/
     	     		SiS_SetCRT2ECLK(ROMAddr,ModeNo,ModeIdIndex,
			          RefreshRateTableIndex,HwDeviceExtension);
     	}
   }

#ifdef SIS300
   if ( (HwDeviceExtension->jChipType==SIS_540)||
        (HwDeviceExtension->jChipType==SIS_630)||
        (HwDeviceExtension->jChipType==SIS_730)||
        (HwDeviceExtension->jChipType==SIS_300) )
     	SiS_OEM300Setting(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo);
#endif

#ifdef SIS315H
   if ( (HwDeviceExtension->jChipType==SIS_315H)||   /* 05/02/01 ynlai for sis550 */
        (HwDeviceExtension->jChipType==SIS_315PRO)||
        (HwDeviceExtension->jChipType==SIS_550) ||   /* 05/02/01 ynlai for 550 */
        (HwDeviceExtension->jChipType==SIS_640) ||   /* 08/20/01 chiawen for 640/740 */
        (HwDeviceExtension->jChipType==SIS_740) ||   /* 09/03/01 chiawen for 640/740 */
        (HwDeviceExtension->jChipType==SIS_650))     /* 09/03/01 chiawen for 650 */
   {
        SiS_OEM310Setting(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
        SiS_CRT2AutoThreshold(BaseAddr);
   }
#endif

   SiS_EnableBridge(HwDeviceExtension,BaseAddr);
   if(SiS_IF_DEF_CH7005==1) {
	if(SiS_VBInfo&SetCRT2ToTV) {
	     /* TW: Disable LCD panel when using TV */
	     SiS_SetRegANDOR(SiS_P3c4,0x11,0xFF,0x0C);
	} else {
	     /* TW: Disable TV when using LCD */
	     SiS_SetCHTVRegANDOR(0x010E,0xF8);
	}
   }
   SiS_DisplayOn();
   SiS_LockCRT2(HwDeviceExtension, BaseAddr);
   return 1;
}

void
SiS_SetGroup1(USHORT BaseAddr,ULONG ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
              PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex)
{
  USHORT  temp=0,tempax=0,tempbx=0,tempcx=0;
  USHORT  pushbx=0,CRT1Index=0;
  USHORT  modeflag,resinfo=0;

  if(ModeNo<=0x13) {
  	/* TW: Do nothing for std modes */
  } else {
    	CRT1Index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
    	CRT1Index=CRT1Index&0x3F;
    	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
  }

  /*301b*/ 
  if( (SiS_VBType&(VB_SIS301B|VB_SIS302B|VB_SIS301LV|VB_SIS302LV))
         && (SiS_VBInfo&SetCRT2ToLCDA) ) {
	   /* TW: Do nothing for these bridge types here */
  } else {
     SiS_SetCRT2Offset(SiS_Part1Port,ROMAddr,ModeNo,ModeIdIndex,
      		       RefreshRateTableIndex,HwDeviceExtension);
     if (HwDeviceExtension->jChipType < SIS_315H ) /* 300 series */
    	   SiS_SetCRT2FIFO(SiS_Part1Port,ROMAddr,ModeNo,
	                   HwDeviceExtension);
     else 					   /* 310 series */
           SiS_SetCRT2FIFO2(SiS_Part1Port,ROMAddr,ModeNo,
	                   HwDeviceExtension);

     SiS_SetCRT2Sync(BaseAddr,ROMAddr,ModeNo,
                     RefreshRateTableIndex);
  }

  if (ModeNo<=0x13)
    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
  else
    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;

  /*301b*/
  if( (SiS_VBType&(VB_SIS301B|VB_SIS302B|VB_SIS301LV|VB_SIS302LV))
   					&& (SiS_VBInfo&SetCRT2ToLCDA) ) {
     	SiS_SetGroup1_LCDA(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
     	                   HwDeviceExtension,RefreshRateTableIndex);
  /*end 301b*/
  } else if (HwDeviceExtension->jChipType < SIS_315H ) {
    /* ------------- 300 series --------------*/
    temp=(SiS_VGAHT-1)&0x0FF;   					/* BTVGA2HT 0x08,0x09 */
    SiS_SetReg1(SiS_Part1Port,0x08,temp);
    temp=(((SiS_VGAHT-1)&0xFF00)>>8)<<4;
    SiS_SetRegANDOR(SiS_Part1Port,0x09,~0x0F0,temp); 	/* <------------------- */

    temp=(SiS_VGAHDE+12)&0x0FF;                               		/* BTVGA2HDEE 0x0A,0x0C */
    SiS_SetReg1(SiS_Part1Port,0x0A,temp); 		/* <------------------- */
        
    pushbx=SiS_VGAHDE+12;                                     		/* bx  BTVGA@HRS 0x0B,0x0C */
    tempcx=(SiS_VGAHT-SiS_VGAHDE)>>2;                           	/* cx */
    tempbx=pushbx+tempcx;
    tempcx=tempcx<<1;
    tempcx=tempcx+tempbx;
    
    if(SiS_IF_DEF_LVDS==0) {
      if(SiS_VBInfo&SetCRT2ToRAMDAC){
        tempbx = SiS_CRT1Table[CRT1Index].CR[4];
        tempbx = tempbx|((SiS_CRT1Table[CRT1Index].CR[14]&0xC0)<<2);
        tempbx = (tempbx-1)<<3;
        tempcx = SiS_CRT1Table[CRT1Index].CR[5];
        tempcx = tempcx&0x1F;
        temp = SiS_CRT1Table[CRT1Index].CR[15];
        temp = (temp&0x04)<<(6-2);
        tempcx=((tempcx|temp)-1)<<3;
      }
    }
   /*add for hardware request*/
    if((SiS_VBInfo&SetCRT2ToTV)&&(resinfo==0x08)){
        if(SiS_VBInfo&SetPALTV){
      		tempbx=1040;
      		tempcx=1042;
      	} else {
      		tempbx=1040;
      		tempcx=1042;
      	}
    }

    temp=tempbx&0x00FF;
    SiS_SetReg1(SiS_Part1Port,0x0B,temp); 		/* <------------------- */
    
  } else {
     /* ---------------------- 310 series ------------------*/
     if (modeflag&HalfDCLK) { /* for low resolution mode */
         temp=(SiS_VGAHT/2-1)&0x0FF;                             /* BTVGA2HT 0x08,0x09 */
         SiS_SetReg1(SiS_Part1Port,0x08,temp);
         temp=(((SiS_VGAHT/2-1)&0xFF00)>>8)<<4;
         SiS_SetRegANDOR(SiS_Part1Port,0x09,~0x0F0,temp);
         temp=(SiS_VGAHDE/2+16)&0x0FF;                           /* BTVGA2HDEE 0x0A,0x0C */
         SiS_SetReg1(SiS_Part1Port,0x0A,temp);

         pushbx=SiS_VGAHDE/2+16;
         tempcx=((SiS_VGAHT-SiS_VGAHDE)/2)>>2;                   /* cx */
         tempbx=pushbx+tempcx;                                   /* bx  BTVGA@HRS 0x0B,0x0C */
         tempcx=tempcx+tempbx;

         if(SiS_IF_DEF_LVDS==0) {
             if(SiS_VBInfo&SetCRT2ToRAMDAC){
                tempbx = SiS_CRT1Table[CRT1Index].CR[4];
                tempbx = tempbx|((SiS_CRT1Table[CRT1Index].CR[14]&0xC0)<<2);
                tempbx = (tempbx-3)<<3;         		/*(VGAHRS-3)*8 */
                tempcx = SiS_CRT1Table[CRT1Index].CR[5];
                tempcx = tempcx&0x1F;
                temp = SiS_CRT1Table[CRT1Index].CR[15];
                temp = (temp&0x04)<<(5-2);      		/*VGAHRE D[5]*/
                tempcx=((tempcx|temp)-3)<<3;    		/* (VGAHRE-3)*8 */
             }
         }
         tempbx += 4;
         tempcx += 4;
         if (tempcx>(SiS_VGAHT/2))
              tempcx = SiS_VGAHT/2;
         temp=tempbx&0x00FF;
         SiS_SetReg1(SiS_Part1Port,0x0B,temp);
    } else {
         temp=(SiS_VGAHT-1)&0x0FF;                             	/* BTVGA2HT 0x08,0x09 */
         SiS_SetReg1(SiS_Part1Port,0x08,temp);
         temp=(((SiS_VGAHT-1)&0xFF00)>>8)<<4;
         SiS_SetRegANDOR(SiS_Part1Port,0x09,~0x0F0,temp);
         temp=(SiS_VGAHDE+16)&0x0FF;                            /* BTVGA2HDEE 0x0A,0x0C */
         SiS_SetReg1(SiS_Part1Port,0x0A,temp);

         pushbx=SiS_VGAHDE+16;
         tempcx=(SiS_VGAHT-SiS_VGAHDE)>>2;                      /* cx */
         tempbx=pushbx+tempcx;                                  /* bx  BTVGA@HRS 0x0B,0x0C */
         tempcx=tempcx+tempbx;
      
         if(SiS_IF_DEF_LVDS==0) {
             if(SiS_VBInfo&SetCRT2ToRAMDAC){
                tempbx = SiS_CRT1Table[CRT1Index].CR[4];
                tempbx = tempbx|((SiS_CRT1Table[CRT1Index].CR[14]&0xC0)<<2);
                tempbx = (tempbx-3)<<3;         		/*(VGAHRS-3)*8 */
                tempcx = SiS_CRT1Table[CRT1Index].CR[5];
                tempcx = tempcx&0x1F;
                temp = SiS_CRT1Table[CRT1Index].CR[15];
                temp = (temp&0x04)<<(5-2);      		/*VGAHRE D[5]*/
                tempcx=((tempcx|temp)-3)<<3;    		/* (VGAHRE-3)*8 */
                tempbx += 16;
                tempcx += 16;
             }
         }
         if (tempcx>SiS_VGAHT)
        	tempcx = SiS_VGAHT;
        /*add for hardware request*/
         if((SiS_VBInfo&SetCRT2ToTV)&&(resinfo==0x08)){
             if(SiS_VBInfo&SetPALTV){
      		 tempbx=1040;
      		 tempcx=1042;
      	     } else {
      		 tempbx=1040;
      		 tempcx=1042;
      	     }
         }
         temp=tempbx&0x00FF;
         SiS_SetReg1(SiS_Part1Port,0x0B,temp);
     }
  }

  /* TW: The following is done for all bridge/chip types/series */

#if 1
  tempax = (tempax&0x00FF)|(tempbx&0xFF00); /* TW: tempax not used above!!!*/
  tempbx=pushbx;
  tempbx=(tempbx&0x00FF)|((tempbx&0xFF00)<<4);
  tempax=tempax|(tempbx&0xFF00);
  temp=(tempax&0xFF00)>>8;
#endif
#if 0
  /* TW: new code: */
  tempax=(tempbx&0xFF00)>>8;
  tempbx=(((pushbx&0xFF00)>>8)<<4)&0xFF;
  temp=tempax|tempbx;
#endif
  SiS_SetReg1(SiS_Part1Port,0x0C,temp); 		/* <------------------- */
  temp=tempcx&0x00FF;
  SiS_SetReg1(SiS_Part1Port,0x0D,temp); 		/* <------------------- */
  tempcx=SiS_VGAVT-1;
  temp=tempcx&0x00FF;
  if(SiS_IF_DEF_CH7005==1) {
    	if(SiS_VBInfo&SetCRT2ToTV) {
      		temp--;
    	}
  }
  SiS_SetReg1(SiS_Part1Port,0x0E,temp); 		/* <------------------- */
  tempbx=SiS_VGAVDE-1;
  temp=tempbx&0x00FF;
  /* [Do the same if CH7005==1 as above?] */
  SiS_SetReg1(SiS_Part1Port,0x0F,temp); 		/* <------------------- */
  temp=((tempbx&0xFF00)<<3)>>8;
  temp=temp|((tempcx&0xFF00)>>8);
  SiS_SetReg1(SiS_Part1Port,0x12,temp); 		/* <------------------- */

  tempax=SiS_VGAVDE;
  tempbx=SiS_VGAVDE;
  tempcx=SiS_VGAVT;
  tempbx=(SiS_VGAVT+SiS_VGAVDE)>>1;                     	/*  BTVGA2VRS     0x10,0x11   */
  tempcx=((SiS_VGAVT-SiS_VGAVDE)>>4)+tempbx+1;          	/*  BTVGA2VRE     0x11        */
  if(SiS_IF_DEF_LVDS==0) {
    	if(SiS_VBInfo & SetCRT2ToRAMDAC){
      		tempbx = SiS_CRT1Table[CRT1Index].CR[8];
      		temp = SiS_CRT1Table[CRT1Index].CR[7];
      		if(temp&0x04) tempbx=tempbx|0x0100;
      		if(temp&0x80) tempbx=tempbx|0x0200;
      		temp = SiS_CRT1Table[CRT1Index].CR[13];
      		if(temp&0x08) tempbx=tempbx|0x0400;
      		temp = SiS_CRT1Table[CRT1Index].CR[9];
      		tempcx=(tempcx&0xFF00)|(temp&0x00FF);
    	}
  }
  temp=tempbx&0x00FF;
  SiS_SetReg1(SiS_Part1Port,0x10,temp); 		/* <------------------- */
  temp=((tempbx&0xFF00)>>8)<<4;
  temp=((tempcx&0x000F)|(temp));
  SiS_SetReg1(SiS_Part1Port,0x11,temp); 		/* <------------------- */
  if(SiS_IF_DEF_LVDS==0) {
    	temp=0x20;
    	if(SiS_LCDResInfo==Panel1280x1024) temp=0x20;
    	if(SiS_LCDResInfo==Panel1280x960) temp=0x24;
    	if(SiS_VBInfo&SetCRT2ToTV) temp=0x08;
    	if(SiS_VBInfo&SetCRT2ToHiVisionTV) {
      		if(SiS_VBInfo&SetInSlaveMode) temp=0x2c;
      		else temp=0x20;
    	}
  } else {
    	temp=0x20;
  }

  if (HwDeviceExtension->jChipType < SIS_315H ) {
    /* ---------- 300 series -------------- */

    SiS_SetRegANDOR(SiS_Part1Port,0x13,~0x03C,temp); 	/* <----------------- */
	/* TW: This register will be adapted according to LCD
	 *     panel type later in the OEM setup functions.
	 *     (Various panel types require a different delay
	 *     such as Clevo 2202; however, on most panels,
	 *     0x20 does nicely.)
	 */

  } else {
    /* ----------- 310 series ---------------*/
    temp >>=2;    /* TW: This is typical SiS code: First calulate temp, then overwrite it... */
    temp = 0x11;    						/*  ynlai 05/30/2001 for delay compenation  */
    SiS_SetReg1(SiS_Part1Port,0x2D,temp);
    /*SiS_SetRegANDOR(SiS_Part1Port,0x2D,~0x00F,temp);*/
    SiS_SetRegAND(SiS_Part1Port,0x13,0xEF);  			/* BDirectLCD=0 for lcd ?? */
    tempax=0;

    if (modeflag&DoubleScanMode) tempax |= 0x80;
    if (modeflag&HalfDCLK) tempax |= 0x40;
    SiS_SetRegANDOR(SiS_Part1Port,0x2C,~0x0C0,tempax);
  }

  if(SiS_IF_DEF_LVDS==0) {
    	SiS_SetGroup1_301(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
	                  HwDeviceExtension,RefreshRateTableIndex);