init.c

linux下的VIDEO接口驱动程序

       }
     }
   }
}

/* TW: Is this a 315E? */
int
Is315E(void)
{
   USHORT  data;
  	
   data=SiS_GetReg1(SiS_P3d4,0x5F);
   if (data&0x10) return 1;
   else return 0;
}

/* TW: For 315 only */
void
SiS_SetDRAMSize_310(PSIS_HW_DEVICE_INFO HwDeviceExtension)
{
   ULONG   ROMAddr  = (ULONG)HwDeviceExtension->pjVirtualRomBase;
   ULONG   FBAddr   = (ULONG)HwDeviceExtension->pjVideoMemoryAddress;
   /*USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;*/
   USHORT  data;

#ifdef SIS301	/* TW: SIS301 ??? */
   /*SiS_SetReg1(SiS_P3d4,0x30,0x40);   */
#endif
#ifdef SIS302   /* TW: SIS302 ??? */
   SiS_SetReg1(SiS_P3d4,0x30,0x4D);  /* alan,should change value */
   SiS_SetReg1(SiS_P3d4,0x31,0xc0);  /* alan,should change value */
   SiS_SetReg1(SiS_P3d4,0x34,0x3F);  /* alan,should change value */
#endif

   SiSSetMode(HwDeviceExtension,0x2e);

   data=SiS_GetReg1(SiS_P3c4,0x21);
   SiS_SetReg1(SiS_P3c4,0x21,(USHORT) (data&0xDF));      /* disable read cache */

   data=SiS_GetReg1(SiS_P3c4,0x1);
   data=data|0x20;
   SiS_SetReg1(SiS_P3c4,0x01,data);                    /* Turn OFF Display */

   data=SiS_GetReg1(SiS_P3c4,0x16);
   SiS_SetReg1(SiS_P3c4,0x16,(USHORT) (data|0x0F));      /* assume lowest speed DRAM */

   SiS_SetDRAMModeRegister(ROMAddr);
   SiS_DisableRefresh();
   SiS_CheckBusWidth_310(ROMAddr,FBAddr);

   SiS_VerifyMclk(FBAddr); /* alan 2000/7/3 */

   if (SiS_Get310DRAMType(ROMAddr)<2) {
     SiS_SDRSizing(FBAddr);
   } else {
     SiS_DDRSizing(FBAddr);
   }
   
   if (Is315E()) {
     data=SiS_GetReg1(SiS_P3c4,0x14);
     if ((data&0x0C)==0x0C) /* dual channel */
     {
     	if ((data&0xF0)>0x40)
     	  data = (data & 0x0F) | 0x40;
     } else { /* single channel */
     	if ((data&0xF0)>0x50)
     	  data = (data & 0x0F) | 0x50;
     }
   }
   
   SiS_SetReg1(SiS_P3c4,0x16,SiS_SR15[1][SiS_RAMType]);  /* restore SR16 */

   SiS_EnableRefresh(ROMAddr);
   data=SiS_GetReg1(SiS_P3c4,0x21);
   SiS_SetReg1(SiS_P3c4,0x21,(USHORT) (data|0x20));      /* enable read cache */
}
#endif

void
SiS_SetMemoryClock(ULONG ROMAddr)
{
   SiS_SetReg1(SiS_P3c4,0x28,SiS_MCLKData[SiS_RAMType].SR28);
   SiS_SetReg1(SiS_P3c4,0x29,SiS_MCLKData[SiS_RAMType].SR29);
   SiS_SetReg1(SiS_P3c4,0x2A,SiS_MCLKData[SiS_RAMType].SR2A);
   SiS_SetReg1(SiS_P3c4,0x2E,SiS_ECLKData[SiS_RAMType].SR2E);
   SiS_SetReg1(SiS_P3c4,0x2F,SiS_ECLKData[SiS_RAMType].SR2F);
   SiS_SetReg1(SiS_P3c4,0x30,SiS_ECLKData[SiS_RAMType].SR30);

#ifdef SIS315H
   if (Is315E()) {
     SiS_SetReg1(SiS_P3c4,0x28,0x3B); /* 143 */
     SiS_SetReg1(SiS_P3c4,0x29,0x22);
     SiS_SetReg1(SiS_P3c4,0x2E,0x3B); /* 143 */
     SiS_SetReg1(SiS_P3c4,0x2F,0x22);
   }
#endif
}

#endif /* ifndef LINUX_XF86 */

#ifdef SIS315H
UCHAR
SiS_Get310DRAMType(ULONG   ROMAddr)
{
   UCHAR   data;

   /*
   index=SiS_GetReg1(SiS_P3c4,0x1A);
   index=index&07;
   */
   if (*pSiS_SoftSetting&SoftDRAMType)
     data = *pSiS_SoftSetting & 0x03;
   else
     data=SiS_GetReg1(SiS_P3c4,0x3a) & 0x03;

   return data;
}
#endif

/* SiSInit END */

/* ----------------------------------------- */

void SiSRegInit(USHORT BaseAddr)
{
   SiS_P3c4=BaseAddr+0x14;
   SiS_P3d4=BaseAddr+0x24;
   SiS_P3c0=BaseAddr+0x10;
   SiS_P3ce=BaseAddr+0x1e;
   SiS_P3c2=BaseAddr+0x12;
   SiS_P3ca=BaseAddr+0x1a;
   SiS_P3c6=BaseAddr+0x16;
   SiS_P3c7=BaseAddr+0x17;
   SiS_P3c8=BaseAddr+0x18;
   SiS_P3c9=BaseAddr+0x19;
   SiS_P3da=BaseAddr+0x2A;
   SiS_Part1Port=BaseAddr+SIS_CRT2_PORT_04;
   SiS_Part2Port=BaseAddr+SIS_CRT2_PORT_10;
   SiS_Part3Port=BaseAddr+SIS_CRT2_PORT_12;
   SiS_Part4Port=BaseAddr+SIS_CRT2_PORT_14;
   SiS_Part5Port=BaseAddr+SIS_CRT2_PORT_14+2;
   SiS_DDC_Port=BaseAddr+0x14;  /* 0x3c4; */
}

void
SiSInitPCIetc(PSIS_HW_DEVICE_INFO HwDeviceExtension)
{
#ifdef LINUX_XF86
   if ((HwDeviceExtension->jChipType == SIS_540)||
       (HwDeviceExtension->jChipType == SIS_630)||
       (HwDeviceExtension->jChipType == SIS_730)||
       (HwDeviceExtension->jChipType == SIS_300)) {
       /* TW: Set - PCI LINEAR ADDRESSING ENABLE (0x80)
		  - PCI IO ENABLE  (0x20)
		  - MMIO ENABLE (0x1)
  	*/
       SiS_SetReg1(SiS_P3c4,0x20,0xa1);
       /* TW: Enable 2D (0x42) & 3D accelerator (0x18) */
       SiS_SetReg1(SiS_P3c4,0x1E,0x5A);
   }
   if((HwDeviceExtension->jChipType == SIS_315H)||
      (HwDeviceExtension->jChipType == SIS_315PRO)||
      (HwDeviceExtension->jChipType == SIS_550)||
      (HwDeviceExtension->jChipType == SIS_640)||
      (HwDeviceExtension->jChipType == SIS_740)||
      (HwDeviceExtension->jChipType == SIS_650)) {
      /* TW: This seems to be done the same way on these chipsets */
      SiS_SetReg1(SiS_P3c4,0x20,0xa1);
      SiS_SetReg1(SiS_P3c4,0x1E,0x5A);
   }
#endif
}

void
SiSSetLVDSetc(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo)
{
   ULONG   temp;

   SiS_IF_DEF_LVDS=0;
   SiS_IF_DEF_CH7005=0;
   SiS_IF_DEF_HiVision=0;
   SiS_IF_DEF_DSTN=0;
   SiS_IF_DEF_FSTN=0;
   if((ModeNo==0x5a)||(ModeNo==0x5b)) {
   	SiS_IF_DEF_DSTN=1;   /* for 550 dstn */
   	SiS_IF_DEF_FSTN=1;   /* for fstn */
   }
   if((HwDeviceExtension->jChipType == SIS_540)||
      (HwDeviceExtension->jChipType == SIS_630)||
      (HwDeviceExtension->jChipType == SIS_730)||
      (HwDeviceExtension->jChipType == SIS_550)||
      (HwDeviceExtension->jChipType == SIS_640)||   /* 08/20/01 chiawen for 640/740 */
      (HwDeviceExtension->jChipType == SIS_740)||   /* 09/03/01 chiawen for 640/740 */
      (HwDeviceExtension->jChipType == SIS_650))    /* 09/03/01 chiawen for 650 */
    {
      	if (SiS_IF_DEF_FSTN) {                               /*fstn setCR37=0x04;*/
        	SiS_SetReg1(SiS_P3d4,0x37,0x04);
      	}
      	temp=SiS_GetReg1(SiS_P3d4,0x37);
      	temp=(temp&0x0E)>>1;
      	if((temp==0)||(temp==1)) {   /* for 301 */
        	SiS_IF_DEF_LVDS=0;
        	SiS_IF_DEF_CH7005=0;
        	SiS_IF_DEF_TRUMPION=0;
      	}
      	if((temp>=2)&&(temp<=5)) SiS_IF_DEF_LVDS=1;
      	if(temp==3) SiS_IF_DEF_TRUMPION=1;
      	if((temp==4)||(temp==5)) {
		/* TW: Save power status */
		SiS_Backup7005 = SiS_GetCH7005(0x0e);
		SiS_IF_DEF_CH7005=1;
        }
   }
}

void
SiSInitPtr(PSIS_HW_DEVICE_INFO HwDeviceExtension)
{
#ifdef SIS315H
   if((HwDeviceExtension->jChipType == SIS_315H)||  /* 05/02/01 ynlai for sis550 */
      (HwDeviceExtension->jChipType == SIS_315PRO)||
      (HwDeviceExtension->jChipType == SIS_550)||
      (HwDeviceExtension->jChipType == SIS_640)||   /* 08/20/01 chiawen for 640/740 */
      (HwDeviceExtension->jChipType == SIS_740)||   /* 09/03/01 chiawen for 640/740 */
      (HwDeviceExtension->jChipType == SIS_650))    /* 09/03/01 chiawen for 650 */
     InitTo310Pointer();
#endif

#ifdef SIS300
   if ((HwDeviceExtension->jChipType == SIS_540)||
       (HwDeviceExtension->jChipType == SIS_630)||
       (HwDeviceExtension->jChipType == SIS_730)||
       (HwDeviceExtension->jChipType == SIS_300))
     InitTo300Pointer();
#endif
}

/*
 	=========================================
 	======== SiS SetMode Function  ==========
 	=========================================
*/
#ifdef LINUX_XF86
/* TW: This is used for non-Dual-Head mode from X */
BOOLEAN
SiSBIOSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension, ScrnInfoPtr pScrn,
               DisplayModePtr mode)
{
   UShort  ModeNo=0;

   ModeNo = SiS_CalcModeIndex(pScrn, mode);
   if (!ModeNo) return FALSE;

   xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Setting mode 0x%x\n", ModeNo);

   return(SiSSetMode(HwDeviceExtension, pScrn, ModeNo));
}

#ifdef SISDUALHEAD
/* TW: Set CRT1 mode (used for dual head) */
BOOLEAN
SiSBIOSSetModeCRT1(PSIS_HW_DEVICE_INFO HwDeviceExtension, ScrnInfoPtr pScrn,
               DisplayModePtr mode)
{
   ULONG   temp;
   USHORT  ModeIdIndex,KeepLockReg;
   ULONG   ROMAddr  = (ULONG)HwDeviceExtension->pjVirtualRomBase;
   USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
   SISPtr  pSiS = SISPTR(pScrn);
   SISEntPtr pSiSEnt = pSiS->entityPrivate;

   UShort  ModeNo=0;

   ModeNo = SiS_CalcModeIndex(pScrn, mode);
   if (!ModeNo) return FALSE;

   xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Setting mode 0x%x on CRT1\n", ModeNo);

   SiSInitPtr(HwDeviceExtension);

   SiSRegInit(BaseAddr);

   SiSInitPCIetc(HwDeviceExtension);

   SiSSetLVDSetc(HwDeviceExtension, ModeNo);

   /* TW: We don't clear the buffer under X */
   flag_clearbuffer=0;

   /* SiS_PresetScratchregister(SiS_P3d4,HwDeviceExtension);  */      		/* add for CRT2  */
   KeepLockReg = SiS_GetReg1(SiS_P3c4,0x05);
   SiS_SetReg1(SiS_P3c4,0x05,0x86);                             		/* 1.Openkey */

   temp = SiS_SearchModeID(ROMAddr,ModeNo,&ModeIdIndex);        		/* 2.Get ModeID Table  */
   if(temp==0)  return(0);

   /* TW: Determine VBType (301,301B,301LV,302B,302LV) */
   SiS_GetVBType(BaseAddr);

   SiS_GetVBInfo301(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);   	/*add for CRT2 */
   SiS_GetLCDResInfo301(ROMAddr,SiS_P3d4,ModeNo,ModeIdIndex);   		/*add for CRT2 */

   SiS_SetCRT1Group(ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex);

   pSiSEnt->CRT1ModeNo = ModeNo;
   pSiSEnt->CRT1DMode = mode;

   /* TW: SetPitch: Adapt to virtual size & position */
   SiS_SetPitchCRT1(pScrn, BaseAddr);

   /* We have to reset CRT2 if changing mode on CRT1 */
   if (pSiSEnt->CRT2ModeNo != -1) {
        xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "(Re-)Setting mode 0x%x on CRT2\n",
				pSiSEnt->CRT2ModeNo);
	SiSBIOSSetModeCRT2(HwDeviceExtension, pSiSEnt->pScrn_1,
				pSiSEnt->CRT2DMode);
   }

   /* Backup/Set ModeNo in MMIO */
   /* SiS_GetSetModeID(pScrn,ModeNo); */

   if(KeepLockReg==0xA1) SiS_SetReg1(SiS_P3c4,0x05,0x86); /* 05/02/01 ynlai */
   else SiS_SetReg1(SiS_P3c4,0x05,0x00);

   return TRUE;
}

/* TW: Set CRT2 mode (used for dual head) */
BOOLEAN
SiSBIOSSetModeCRT2(PSIS_HW_DEVICE_INFO HwDeviceExtension, ScrnInfoPtr pScrn,
               DisplayModePtr mode)
{
   ULONG   temp;
   USHORT  ModeIdIndex,KeepLockReg;
   ULONG   ROMAddr  = (ULONG)HwDeviceExtension->pjVirtualRomBase;
   USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
   UShort  ModeNo=0;
   SISPtr  pSiS = SISPTR(pScrn);
   SISEntPtr pSiSEnt = pSiS->entityPrivate;

   ModeNo = SiS_CalcModeIndex(pScrn, mode);
   if (!ModeNo) return FALSE;

   SiSInitPtr(HwDeviceExtension);

   SiSRegInit(BaseAddr);

   SiSInitPCIetc(HwDeviceExtension);

   SiSSetLVDSetc(HwDeviceExtension, ModeNo);

   /* TW: We don't clear the buffer under X */
   flag_clearbuffer=0;

   /* TW: Save ModeNo so we can set it from within SetMode for CRT1 */
   pSiSEnt->CRT2ModeNo = ModeNo;
   pSiSEnt->CRT2DMode = mode;

   /* TW: We can't set CRT2 mode before CRT1 mode is set */
   if (pSiSEnt->CRT1ModeNo == -1) {
   	xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
		"Setting CRT2 mode delayed until after setting CRT1 mode\n");
   	return TRUE;
   }

   xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Setting mode 0x%x on CRT2\n", ModeNo);

   /* SiS_PresetScratchregister(SiS_P3d4,HwDeviceExtension);      */  		/* add for CRT2  */
   KeepLockReg = SiS_GetReg1(SiS_P3c4,0x05);
   SiS_SetReg1(SiS_P3c4,0x05,0x86);                             		/* 1.Openkey */

   temp = SiS_SearchModeID(ROMAddr,ModeNo,&ModeIdIndex);        		/* 2.Get ModeID Table  */
   if(temp==0)  return(0);

   /* TW: Determine VBType (301,301B,301LV,302B,302LV) */
   SiS_GetVBType(BaseAddr);

   SiS_GetVBInfo301(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);   	/*add for CRT2 */
   SiS_GetLCDResInfo301(ROMAddr,SiS_P3d4,ModeNo,ModeIdIndex);   		/*add for CRT2 */

   switch (HwDeviceExtension->ujVBChipID) {
     case VB_CHIP_301:
     case VB_CHIP_301B:    /*for Linux & WinCE to open*/
        SiS_SetCRT2Group301(BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);         /*add for CRT2 */
        break;
     case VB_CHIP_302:
        SiS_SetCRT2Group301(BaseAddr,ROMAddr,ModeNo,HwDeviceExtensi