fesc_5554_sxc.h

MPC5554处理器的初始化例程

#define SXC_BADDR FPGA_INT_MEM_ADDR



//写入0xC寄存器，可以将数据填入待发寄存器，可以重复写入
//写入控制寄存器的SEND位，这个数据被填入移位寄存器
//发送期间BUSY位置起。发送完成TCF和RDF置起
//需要单独写控制寄存器相应的清除标志位
//读取0xC寄存器读回接收数据。

#define TCFC_MASK 0x80
#define RDFC_MASK 0x40
#define SEND_MASK 0x20


typedef struct   //SPI cross checker
{ //-----------------0
	union
	{
		 vuint32_t R;
		struct{
			vuint32_t:24;
			vuint32_t TCFC:1;  //clear TCF flag
			vuint32_t RDFC:1;  //clear RDF flag
			vuint32_t SEND:1;	 //send SPI out
			vuint32_t:2; 
  		vuint32_t self_packet_done:1;	
			vuint32_t PACKET_CNT_CLR:1;  //pack counter clear
			vuint32_t PACKET_START:1;  //word counter clear
		}B;
	}SXC_CR;            //auto reset register.
	//-----------------1
	union 
	{
		vuint32_t R;
		struct{
			vuint32_t:24;
			vuint32_t TCF:1;
			vuint32_t RDF:1;
			vuint32_t BUSY:1;
			vuint32_t:2;
			vuint32_t both_packet_done:1;					
			vuint32_t master_fail_first:1; 
			vuint32_t slave_fail_first:1;  
			}B;
	}SXC_SR;
	//-----------------2
	union
	{
		vuint32_t R;
		struct{
			vuint32_t:24;
			vuint32_t DATA:8;
		}B;
	}SPI_HOST_DATA_REG;	
	//-----------------3				
	union
	{
		vuint32_t R;
		struct{
			vuint32_t:24;
			vuint32_t BAUD:8;  //BAUD*32*8.333ns = 1bit time
		}B;
	}SPI_BAUD_REG;	
	
		
	//-----------------4,5,6,7
	union
	{
		vuint32_t R;
		struct{
			vuint32_t:24;
			vuint32_t CNT:8;
		}B;
	}RESERVE[4];
			
	//-----------------8
	union
	{
		vuint32_t R;
		struct{
			vuint32_t:24;
			vuint32_t CNT:8;
		}B;
	}SELF_PCR;
	//-----------------9
	union
	{
		vuint32_t R;
		struct{
			vuint32_t:24;
			vuint32_t CNT:8;
		}B;
	}SELF_WCR;

	//-----------------10
	union
	{
		vuint32_t R;
		struct{
			vuint32_t:24;
			vuint32_t DATA:8;
		}B;
	}SELF_OUT_SPY_R;
	//-----------------11
	union
	{
		vuint32_t R;
		struct{
			vuint32_t:24;
			vuint32_t DATA:8;
		}B;
	}SELF_IN_SPY_R;

	
	//-----------------12
	union
	{
		vuint32_t R;
		struct{
			vuint32_t:24;
			vuint32_t CNT:8;
		}B;
	}MATE_PCR;	
	//-----------------13
	union
	{
		vuint32_t R;
		struct{
			vuint32_t:24;
			vuint32_t CNT:8;
		}B;
	}MATE_WCR;
	//-----------------14
	union
	{
		vuint32_t R;
		struct{
			vuint32_t:24;
			vuint32_t DATA:8;
		}B;
	}MATE_OUT_SPY_R;			
	//-----------------15
	union
	{
		vuint32_t R;
		struct{
			vuint32_t:24;
			vuint32_t DATA:8;
		}B;
	}MATE_IN_SPY_R;		
}SXC_tag;





//每个通道有16个寄存器
//
typedef struct 
{
	SXC_tag   CH[8];   //8个通道.  8*16 = 128
	//--------
	union{
		vuint32_t R;
		struct{
			vuint32_t:24;
			vuint32_t B:8;  //readout 0xDD
		}B;
	}Reserve[120]; 
	//--------
	union{
		vuint32_t R;
		struct{
			vuint32_t:24;
			vuint32_t B:8;  
		}B;
	}CNT_Reg[8];          //最后一个测试寄存器
}SXC_G;

#define SXC_0  (*(  SXC_tag *) (SXC_BADDR +   0x64*0))
#define SXC_1  (*(  SXC_tag *) (SXC_BADDR +   0x64*1))
#define SXC_2  (*(  SXC_tag *) (SXC_BADDR +   0x64*2))
#define SXC_3  (*(  SXC_tag *) (SXC_BADDR +   0x64*3))
#define SXC_4  (*(  SXC_tag *) (SXC_BADDR +   0x64*4))
#define SXC_5  (*(  SXC_tag *) (SXC_BADDR +   0x64*5))
#define SXC_6  (*(  SXC_tag *) (SXC_BADDR +   0x64*6))
#define SXC_7  (*(  SXC_tag *) (SXC_BADDR +   0x64*7))
#define SXC    (*(  SXC_G *)   (SXC_BADDR ))