fesc_5554_spicomm.h

MPC5554处理器的初始化例程

// SLIP special character codes
#define END         0xC0
#define ESC         0xDB
#define ESC_ESC     0xDD
#define ESC_END     0xDC
// extended special character codes
#define ESC_FLUSH   'F'   //0x46
#define ESC_IDLE    'I'   //0x49
#define ESC_ERROR   ESC
// Single byte control char
#define CHAR_BUSY   'B'   //0x42
#define CHAR_READY  'R'   //0x52
#define CHAR_NULL   'U'   //0x55


#define SPI_COMM_DEFAULT_SBP_RTSTUS_OverTime    64
#define SPI_TX_BUF_SIZE 256
#define SPI_RX_BUF_SIZE 256

#define SBP_RTSTUS_SXC_Veto            100
#define SBP_RTSTUS_OK                  0
#define SBP_RTSTUS_OverTime            1
#define SBP_RTSTUS_DUAL_ESC            2
#define SBP_RTSTUS_ESC_ILLEGAL_BYTE    3
#define SBP_RTSTUS_FEEDBACK_ERROR      4
#define SBP_RTSTUS_ILLEGAL_INSTRC_CHAR 5
#define SBP_RTSTUS_INSTRC_WRONG        6
#define SBP_RTSTUS_UNKNOWN             7
#define SBP_RTSTUS_INSTRC_RX_OK        8
#define SBP_RTSTUS_ILLEGAL_NULL_CHAR   9  

 
 
//--------------------------------master-------------------
typedef enum __spimstst 
{
 spistIdle, 
 spistInsTx,
 spistWtBusy,
 spistDataTX,
 spistDataTXTailESC,
 spistDataTXTailIDLE,
 spistDataTXTailESC2,
 spistDataRX,
 spistDone,
 spistBusy,      //slave use only
 spistRxReady,   //slave use
 spistTxReady    //slave use   
}SBPSMStatus;

typedef struct __SBP_Buffer
{
  // RAW buffer, pure payload
  uint8_t  TxBuffer[SPI_TX_BUF_SIZE];
  uint8_t  RxBuffer[SPI_RX_BUF_SIZE];
  uint16_t  iTxBufferLen;
  uint16_t  iRxBufferLen;
  uint16_t  iTxBufPos;       // TX buffer position
  uint16_t  SBP_RTSTUS_OverTimeCnt;
  
  // instruction buffer
  uint8_t InstrBuffer[8];   //F,Command,LID,B
  uint8_t iInstrBufPos;       // TX buffer position
  
  SBPSMStatus ssSPIStat;       // SPI status machine 
  uint8_t  returnStat;
  uint8_t  isFinished;  
  uint8_t  isLastESC;
  uint8_t  isCurrentESC;
  uint8_t  cTx;
  uint8_t  cRx;
  uint8_t  cTxLast;        // transmitt history
  uint8_t  amIWriteData;
  uint8_t  feedback_verify;
} SBPBuffer;