pe_mpc5554_sram.ld

MPC5554处理器的初始化例程

GROUP (-lc -lnosys);
ENTRY(__start) 
/* 
 *****************************************************************
 * pe_MPC5554_SRAM.ld                                           
 * GNU powerpc-eabispe Linker Script for the MPC5554                                  
 * By default, this application uses SRAM and cache
 * c. 2006, P&E Microcomputer Systems, Inc. 
 *****************************************************************
 */                

 
MEMORY
{

/*  2M Internal Flash, but subtract one 128K block for use by BAM. */
  flash_rcw  :        org = 0x00000000, len = 0x8
  int_flash  :        org = 0x00000008, len = 0x200000-0x8
/*  60K Internal SRAM */
  int_sram    :   org = 0x40000000,  len =  0xF000		
/*  512K External SRAM (unused) */
  ext_ram     : org = 0x3ff80000,    len = 0x80000
}

/* Stack Address Parameters */
/*  4K of internal cache used for stack. */
__SP_INIT      = 0x40010000;  
__SP_END       = 0x4000F000; 
__STACK_SIZE   = 0x1000;

/*
Optionally define this variable with the address of heap
__heap_start   = 
*/

/*************************************************************************
 *************************************************************************/
 
/*
 * The P&E default memory map looks like this:
 *
 * +-------------------------+ <- low memory
 * | .pecrt0                 | Executable code 
 * | .interp                 |
 * | .hash                   |
 * | .dynsym                 |
 * | .dynstr                 |
 * | .text                   | 
 * | .init                   |
 * | .fini                   |
 * | .flash_data             |
 * | .rodata                 |
 * | .rodata1                |
 * | .PPC.EMB.apuinfo        |
 * | .isrvectbl              |
 * | .xcptn                  |
 * | etext = .               |
 * | _etext = .              |  
 * | __etext = .             | 
 * |                         | > int_sram
 * +-------------------------+
 * | __DATA_ROM = .          | Global/static data
 * | .PPC.EMB.sdata2         |
 * | _SDA2_BASE_ = .         |
 * | __SDATA2_START__ = .    |
 * | .sdata2                 |
 * | .PPC.EMB.sbss2          |
 * | .sbss2                  |
 * | __SBSS2_END__ = .       |
 * | .data                   |
 * | .data1                  |
 * | _GOT_START_ = .         |
 * | .got                    |
 * | .got.plt                |
 * | _GOT_END_ = .           |
 * | .got1                   |
 * | _GOT2_START_ = .        |
 * | .got2                   |
 * | __CTOR_LIST__ = .       |
 * | .ctors                  |
 * | __CTOR_END__ = .        |
 * | __DTOR_LIST__ = .       |
 * | .dtors                  |
 * | __DTOR_END__ = .        |
 * | _FIXUP_START_ = .       |
 * | .fixup                  |
 * | _FIXUP_END_ = .         |
 * | _GOT2_END_ = .          |
 * | .dynamic                |
 * | .plt                    |
 * | __SDATA_ROM = .         |
 * | .sdata                  |
 * | __SDATA_START__ = .     |
 * | _SDA_BASE_ = .          |
 * | .PPC.EMB.sdata0         |
 * | __SDATA_END__ = .       |
 * | __DATA_ROM_END = .      |
 * | edata = .               |
 * | _edata  =  .            |
 * | __edata = .             |
 * |                         | > int_sram
 * +-------------------------+
 * | .sbss                   |
 * | __sbss_start = .        |
 * | ___sbss_start = .       |
 * | .PPC.EMB.sbss0          |
 * | __sbss_end = .          |
 * | ___sbss_end = .         |
 * | __SBSS_END__ = .        |
 * | .bss                    |
 * | __bss_start = .         |
 * | ___bss_start = .        |
 * | __bss_end = .           |
 * | _end = .                | Start of heap, used by sbrk()
 * | (_end=__heap_start)     |
 * | end = _end              | 
 * | __end = _end            |
 * |                         | > int_sram
 * +-------------------------+
 * .                         .
 * . __SP_END                .
 * .                         .
 * | __SP_INIT               | Top of stack
 * +-------------------------+
 */

/****************************************************************/
  
SECTIONS
{

  /* CRT0 startup code */
  .pecrt0  : 
  { 
    *(.pecrt0)
    PEFILL = .;
  } > int_sram
  
  .interp  : { *(.interp) } > int_sram
  
  .hash : { *(.hash) } > int_sram

  .dynsym : { *(.dynsym) } > int_sram

  .dynstr : { *(.dynstr) } > int_sram

  .text :
  {
    *(.text)
    *(.text.*)
    *(.gnu.warning)
    *(.gnu.linkonce.t*)
	__eabi = (.); /*PE*/
	LONG(0x4E800020); 
  } > int_sram 
    
  .init :  
  {     
    PROVIDE (__init = .);
    *(.init)
  } > int_sram

  .fini :  
  { 
    /*PROVIDE (__fini = .);*/
    *(.fini)
  } > int_sram   
    
  .flash_data :
  {
   *(.flash_data)
  } > int_sram
    
  .rodata :
  {
    *(.rodata)
    *(.rodata.*)
    *(.gnu.linkonce.r*)
  } > int_sram 

  .rodata1 :
  {
    *(.rodata1)
  } > int_sram
  
  .PPC.EMB.apuinfo :
  {
    *(.PPC.EMB.apuinfo)
  } > int_sram
      
  /* ISR table for software vector mode */
  .isrvectbl ALIGN(0x800) : 
  {
    *(.isrvectbl)
  } > int_sram
  
  /* IVOR4Handler */
  .xcptn : 
  {
   *(.xcptn)
  } > int_sram  

  etext = .;
  _etext = .;  
  __etext = .;   
  
  /******************************************************************/

  NEXT_LOAD_ADDR = . ;
  __DATA_ROM = . ;
  
  .PPC.EMB.sdata2 : AT (NEXT_LOAD_ADDR)
  {
    _SDA2_BASE_ = .;
    __SDATA2_START__ = .;
    *(.PPC.EMB.sdata2)
  } > int_sram

  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.PPC.EMB.sdata2);  
           
  .sdata2 : AT (NEXT_LOAD_ADDR) 
  { 
    *(.sdata2) 
  } > int_sram
  
  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.sdata2);  

  .PPC.EMB.sbss2 : AT (NEXT_LOAD_ADDR)
  {
    *(.PPC.EMB.sbss2)
  } > int_sram
  
  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.PPC.EMB.sbss2);
  
  .sbss2 : AT (NEXT_LOAD_ADDR)
  {
    *(.sbss2) 
    __SBSS2_END__ = .;
  } > int_sram

  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.sbss2);

  .data : AT (NEXT_LOAD_ADDR)
  {
    *(.data)
    *(.data.*) 
    *(.gnu.linkonce.d*)
    CONSTRUCTORS
  } > int_sram 
  
  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.data);
  
  .data1 : AT (NEXT_LOAD_ADDR)
  {
    *(.data1) 
  } > int_sram

  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.data1);  

  PROVIDE (_GOT_START_ = .);

  .got : AT (NEXT_LOAD_ADDR)
  { 
    *(.got) 
  } > int_sram 
  
  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.got);  
  
  .got.plt : AT (NEXT_LOAD_ADDR)
  { 
    *(.got.plt) 
  } > int_sram     

  PROVIDE (_GOT_END_ = .);
  
  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.got.plt);
       
  .got1 : AT (NEXT_LOAD_ADDR)
  {  
    *(.got1) 
  } > int_sram 
  
  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.got1);
  
  PROVIDE (_GOT2_START_ = .);
  
  .got2 : AT (NEXT_LOAD_ADDR)
  { 
    *(.got2) 
  } > int_sram

  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.got2);

  PROVIDE (__CTOR_LIST__ = .);  

  .ctors : AT (NEXT_LOAD_ADDR)
  {
    /*KEEP (*crtbegin.o(.ctors))
    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
    KEEP (*(SORT(.ctors.*)))*/
    KEEP (*(.ctors))
  } > int_sram   

  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.ctors);

  PROVIDE (__CTOR_END__ = .);
  PROVIDE (__DTOR_LIST__ = .);

  .dtors : AT (NEXT_LOAD_ADDR)
  {
    /*KEEP (*crtbegin.o(.dtors))
    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
    KEEP (*(SORT(.dtors.*)))*/
    KEEP (*(.dtors))
  } > int_sram 
  
  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.dtors);
    
  PROVIDE (__DTOR_END__ = .);
  PROVIDE (_FIXUP_START_ = .);  

  .fixup : AT (NEXT_LOAD_ADDR)
  { 
    *(.fixup) 
  } > int_sram 

  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.fixup);
  
  PROVIDE (_FIXUP_END_ = .);
  PROVIDE (_GOT2_END_ = .);   
  
  .dynamic : AT (NEXT_LOAD_ADDR)
  { 
    *(.dynamic)
  } > int_sram
   
  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.dynamic);  
  
  .plt : AT (NEXT_LOAD_ADDR)
  {
    *(.plt)
  } > int_sram
  
  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.plt);  
  
  /* We want the small data sections together, so single-instruction offsets
     can access them all, and initialized data all before uninitialized, so
     we can shorten the on-disk segment size.  */

  __SDATA_ROM = .;
    
  .sdata : AT (NEXT_LOAD_ADDR)
  { 
    __SDATA_START__ = .;
    _SDA_BASE_ = .;
    *(.sdata) 
  } > int_sram 

  NEXT_LOAD_ADDR = NEXT_LOAD_ADDR + SIZEOF(.sdata);  
  
  .PPC.EMB.sdata0 : AT (NEXT_LOAD_ADDR)
  {
    __SDATA_END__ = .;  
  } > int_sram
  
  __DATA_ROM_END = .;
  edata = .;
  _edata  =  .;  
  __edata = .;

  /******************************************************************/  
    
  .sbss BLOCK (4):
  {
    PROVIDE (__sbss_start = .);
    PROVIDE (___sbss_start = .);    
    *(.sbss)
    *(.scommon)
    *(.dynsbss)
  } > int_sram

  .PPC.EMB.sbss0 BLOCK (4):
  {
    *(.PPC.EMB.sbss0)
    PROVIDE (__sbss_end = .);
    PROVIDE (___sbss_end = .);
    PROVIDE (__SBSS_END__ = .);
  } > int_sram
  
  .bss BLOCK (4):
  {
   PROVIDE (__bss_start = .);
   PROVIDE (___bss_start = .);
   *(.dynbss)
   *(.bss)
   *(COMMON)
   PROVIDE (__bss_end = .);
  } > int_sram
  
  /******************************************************************/
  
  /*
  Heap grows from lower to higer addresses
  Stack grows from higer to lower addresses
  */

  /* Define position of heap */
  /* Default to location contiguous with .bss section in RAM */
  _end = DEFINED (__heap_start) ? __heap_start : ALIGN(4);    
  PROVIDE(end = _end);
  PROVIDE(__end = _end);
 
  /******************************************************************/

  .gcc_except_table : {*(.gcc_except_table)}
 
  /* These are needed for ELF backends which have not yet been
     converted to the new style linker.  */
  .stab 0 : { *(.stab) }
  .stabstr 0 : { *(.stabstr) }
  /* DWARF debug sections.
     Symbols in the DWARF debugging sections are relative to the beginning
     of the section so we begin them at 0.  */
  /* DWARF 1 */
  .debug          0 : { *(.debug) }
  .line           0 : { *(.line) }
  /* GNU DWARF 1 extensions */
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  .debug_sfnames  0 : { *(.debug_sfnames) }
  /* DWARF 1.1 and DWARF 2 */
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  /* DWARF 2 */
  .debug_info     0 : { *(.debug_info) }
  .debug_abbrev   0 : { *(.debug_abbrev) }
  .debug_line     0 : { *(.debug_line) }
  .debug_frame    0 : { *(.debug_frame) }
  .debug_str      0 : { *(.debug_str) }
  .debug_loc      0 : { *(.debug_loc) }
  .debug_macinfo  0 : { *(.debug_macinfo) }
  /* SGI/MIPS DWARF 2 extensions */
  .debug_weaknames 0 : { *(.debug_weaknames) }
  .debug_funcnames 0 : { *(.debug_funcnames) }
  .debug_typenames 0 : { *(.debug_typenames) }
  .debug_varnames  0 : { *(.debug_varnames) }
  /* */
  .eh_frame        0 : { *(.eh_frame) }

  /******************************************************************/  
  
__SRAM_CPY_START = ADDR(.PPC.EMB.sdata2);
__IV_ADDR     = ADDR(.xcptn);
__SRAM_LOAD      = (_end);
__SRAM_LOAD_SIZE = (SIZEOF(.flash_data) / 4);

TEMPSIZE = SIZEOF(.PPC.EMB.sdata2)+SIZEOF(.sdata2)+SIZEOF(.PPC.EMB.sbss2)+SIZEOF(.sbss2)+SIZEOF(.data)+SIZEOF(.data1);
TEMPSIZE = TEMPSIZE + SIZEOF(.got)+SIZEOF(.got.plt)+SIZEOF(.got1)+SIZEOF(.got2)+SIZEOF(.ctors);
TEMPSIZE = TEMPSIZE + SIZEOF(.dtors)+SIZEOF(.fixup)+SIZEOF(.dynamic)+SIZEOF(.plt);
TEMPSIZE = TEMPSIZE + SIZEOF(.sdata)+SIZEOF(.PPC.EMB.sdata0);
__ROM_COPY_SIZE  = (TEMPSIZE);

}

  /******************************************************************/