mpc5500_ebi_32.mac

MPC5554处理器的初始化例程

quiet on    ; Make sure memory window refresh is off

REM This script initializes the external bus for 32-bit external memory.
REM It assumes that the MMU is already configured.

REM    MPC5500_ebi_32, Randy Dees, 15 December 2005

REM Set up the pins
REM Address bus PCR 4 - 27 43
REM configure address bus pins
mm.l $c3f90048 $04400440
mm.l $c3f9004c $04400440
mm.l $c3f90050 $04400440
mm.l $c3f90054 $04400440
mm.l $c3f90058 $04400440
mm.l $c3f9005c $04400440
mm.l $c3f90060 $04400440
mm.l $c3f90064 $04400440
mm.l $c3f90068 $04400440
mm.l $c3f9006c $04400440
mm.l $c3f90070 $04400440
mm.l $c3f90074 $04400440

REM Data bus PCR 28-59
REM configure data bus pins
mm.l $c3f90078 $04400440
mm.l $c3f9007c $04400440
mm.l $c3f90080 $04400440
mm.l $c3f90084 $04400440
mm.l $c3f90088 $04400440
mm.l $c3f9008c $04400440
mm.l $c3f90090 $04400440
mm.l $c3f90094 $04400440
REM These next 8 are not required for 16-bit address bus.
mm.l $c3f90098 $04400440
mm.l $c3f9009c $04400440
mm.l $c3f900a0 $04400440
mm.l $c3f900a4 $04400440
mm.l $c3f900a8 $04400440
mm.l $c3f900ac $04400440
mm.l $c3f900b0 $04400440
mm.l $c3f900b4 $04400440

REM config minimum bus control pins
REM RD/WR  & BDIP PCR 62/63
mm.l $c3f900bc $04400440

REM WE[0-4] PCR 64-67
mm.l $c3f900c0 $04430443
mm.l $c3f900c4 $04430443

REM OE & TS
mm.l $c3f900c8 $04430443

REM configure the chip selects
REM CS[0-3]
mm.l $c3f90040 $04430443
mm.l $c3f90044 $04430443

REM Set up Memory Controller CS0 @ $3ff8_0000
mm.l $c3f84010 $3ff80001 ; Base Register
mm.l $c3f84014 $fff800F0 ; Option Register (15 wait states)

REM Set up Memory Controller CS1 @ $2000_0000
mm.l $c3f84018 $20000001 ; Base Register
mm.l $c3f8401c $fff800F0 ; Option Register (15 wait states)

quiet off     ; turn memory refresh back on