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GAS LISTING E:\sys_temp/cceekcaa.s page 1
1 .file "mpc5500_ccdcfg.c"
2 .section .debug_abbrev,"",@progbits
3 .Ldebug_abbrev0:
4 .section .debug_info,"",@progbits
5 .Ldebug_info0:
6 .section .debug_line,"",@progbits
7 .Ldebug_line0:
8 0000 000000C8 .section ".text"
8 00020000
8 00440401
8 FB0E0A00
8 01010101
9 .Ltext0:
10 .align 2
11 .globl cfg_mpc5500ccd
12 .type cfg_mpc5500ccd, @function
13 cfg_mpc5500ccd:
14 .LFB2:
15 .file 1 "..\\src\\mpc5500_ccdcfg.c"
1:..\src/mpc5500_ccdcfg.c **** /**************************************************************************/
2:..\src/mpc5500_ccdcfg.c **** /* FILE NAME: mpc5500_ccdcfg.c COPYRIGHT (c) Freescale 2004 */
3:..\src/mpc5500_ccdcfg.c **** /* All Rights Reserved */
4:..\src/mpc5500_ccdcfg.c **** /* DESCRIPTION: */
5:..\src/mpc5500_ccdcfg.c **** /* This file contains functions for the MPC5500 assembly configuration. */
6:..\src/mpc5500_ccdcfg.c **** /* The user does not need to make any changes in this file. */
7:..\src/mpc5500_ccdcfg.c **** /* The user will change function field values in mpc5500_ccdcfg.h. */
8:..\src/mpc5500_ccdcfg.c **** /* Choices for field values are found in mpc5500_ccdcfg.h. */
9:..\src/mpc5500_ccdcfg.c **** /*========================================================================*/
10:..\src/mpc5500_ccdcfg.c **** /* REV AUTHOR DATE DESCRIPTION OF CHANGE */
11:..\src/mpc5500_ccdcfg.c **** /* --- ----------- ---------- --------------------- */
12:..\src/mpc5500_ccdcfg.c **** /* 0.1 J. Yokubaitis 24/Nov/03 Initial version */
13:..\src/mpc5500_ccdcfg.c **** /* 0.2 G. Jackson 15/Mar/04 Split into C code configuration */
14:..\src/mpc5500_ccdcfg.c **** /* 0.3 G. Jackson 15/Apr/04 C application functions removed */
15:..\src/mpc5500_ccdcfg.c **** /* 0.4 G. Jackson 13/May/04 Added CS2 and CS3 initializations */
16:..\src/mpc5500_ccdcfg.c **** /* 0.5 G. Jackson 08/Jun/04 Added PCR initialization for the */
17:..\src/mpc5500_ccdcfg.c **** /* external bus and chip select 0 (CS0)*/
18:..\src/mpc5500_ccdcfg.c **** /* with external boot config option */
19:..\src/mpc5500_ccdcfg.c **** /* control. */
20:..\src/mpc5500_ccdcfg.c **** /* 0.6 G. Jackson 10/Jun/04 Changed EXT_BOOT to INT_BOOT as a */
21:..\src/mpc5500_ccdcfg.c **** /* config option in mpc5500_usrccdcfg.h.*/
22:..\src/mpc5500_ccdcfg.c **** /* 1.0 G. Jackson 30/Jun/04 Changed INT_BOOT to I_EXT_BUS_EN */
23:..\src/mpc5500_ccdcfg.c **** /* Added I_DATA_PORT_SIZE */
24:..\src/mpc5500_ccdcfg.c **** /* Added I_CFG_PBRG_XBAR */
25:..\src/mpc5500_ccdcfg.c **** /**************************************************************************/
26:..\src/mpc5500_ccdcfg.c ****
27:..\src/mpc5500_ccdcfg.c ****
28:..\src/mpc5500_ccdcfg.c **** #include "mpc5554.h"
29:..\src/mpc5500_ccdcfg.c **** #include "mpc5500_usrccdcfg.h"
30:..\src/mpc5500_ccdcfg.c ****
31:..\src/mpc5500_ccdcfg.c ****
32:..\src/mpc5500_ccdcfg.c **** /***************************************************************************/
33:..\src/mpc5500_ccdcfg.c **** /* FUNCTION : cfg_mpc5500ccd() */
34:..\src/mpc5500_ccdcfg.c **** /* PURPOSE : This function provides "C" code configuration for the */
35:..\src/mpc5500_ccdcfg.c **** /* MPC5500 family device. Previous initialization has set */
36:..\src/mpc5500_ccdcfg.c **** /* up the FMPLL clock speed, internal SRAM and the stack. */
37:..\src/mpc5500_ccdcfg.c **** /* The cfg_mpc5500ccd function completes initialization by */
38:..\src/mpc5500_ccdcfg.c **** /* making desired changes to the XCLKS, EBI chip selects, */
GAS LISTING E:\sys_temp/cceekcaa.s page 2
39:..\src/mpc5500_ccdcfg.c **** /* with default settings for PBRIDGE_A, PBRIDGE_B, and the */
40:..\src/mpc5500_ccdcfg.c **** /* XBAR. */
41:..\src/mpc5500_ccdcfg.c **** /* */
42:..\src/mpc5500_ccdcfg.c **** /* In cases where (numerous) alternative initializations */
43:..\src/mpc5500_ccdcfg.c **** /* are desired, a sample configuration is included here. */
44:..\src/mpc5500_ccdcfg.c **** /* Actual initialization required for a specific system */
45:..\src/mpc5500_ccdcfg.c **** /* remains the responsibility of the developer. */
46:..\src/mpc5500_ccdcfg.c **** /* INPUT NOTES : (from mpc5500_usrccdcfg.h) I_CFG_XCLKS, I_EXT_BUS_EN, */
47:..\src/mpc5500_ccdcfg.c **** /* I_CFG_PBRG_XBAR */
48:..\src/mpc5500_ccdcfg.c **** /* RETURN NOTES : None */
49:..\src/mpc5500_ccdcfg.c **** /* WARNING : An external boot will configure CS0, the address bus, */
50:..\src/mpc5500_ccdcfg.c **** /* and the data bus; I_EXT_BUS_EN = YES will reconfigure */
51:..\src/mpc5500_ccdcfg.c **** /* the external bus with settings in mpc5500_usrccdcfg.h. */
52:..\src/mpc5500_ccdcfg.c **** /***************************************************************************/
53:..\src/mpc5500_ccdcfg.c ****
54:..\src/mpc5500_ccdcfg.c **** /* MPC5500 initialization functions */
55:..\src/mpc5500_ccdcfg.c **** void cfg_mpc5500ccd() {
16 twu %r1,-16(%r1)
17 0000 9421FFF0 .LCFI0:
18 mflr %r0
19 0004 7C0802A6 stw %r31,12(%r1)
20 0008 93E1000C .LCFI1:
21 stw %r0,20(%r1)
22 000c 90010014 .LCFI2:
23 mr %r31,%r1
24 0010 7C3F0B78 .LCFI3:
25 .loc 1 58 0
56:..\src/mpc5500_ccdcfg.c **** /*void cfg_mpc5500ccd(uint8_t External_Boot) { */
57:..\src/mpc5500_ccdcfg.c **** if(I_CFG_XCLKS) { /* Option to change external clock speeds */
58:..\src/mpc5500_ccdcfg.c **** cfg_XCLKS(); /* Set up the External Clock speeds */
26 LKS
27 0014 48000001 .loc 1 63 0
59:..\src/mpc5500_ccdcfg.c **** } /* end I_CFG_XCLKS */
60:..\src/mpc5500_ccdcfg.c ****
61:..\src/mpc5500_ccdcfg.c **** if(I_EXT_BUS_EN) { /* Set up external bus if enabled */
62:..\src/mpc5500_ccdcfg.c ****
63:..\src/mpc5500_ccdcfg.c **** cfg_PCR(); /* Set up Pad Configuration Registers for external bus */
28 l cfg_PCR
29 0018 48000001 .loc 1 65 0
64:..\src/mpc5500_ccdcfg.c ****
65:..\src/mpc5500_ccdcfg.c **** cfg_EBI(); /* Configure the External Bus Interface Chip Selects */
30 l cfg_EBI
31 001c 48000001 .loc 1 79 0
66:..\src/mpc5500_ccdcfg.c ****
67:..\src/mpc5500_ccdcfg.c **** } /* end external bus enable */
68:..\src/mpc5500_ccdcfg.c ****
69:..\src/mpc5500_ccdcfg.c **** if(I_CFG_PBRG_XBAR) { /* Skip if not configuring PBRIDGEs or XBAR */
70:..\src/mpc5500_ccdcfg.c **** /* NOTE: These steps may not be necessary. */
71:..\src/mpc5500_ccdcfg.c **** /* The user must know the exact effect. */
72:..\src/mpc5500_ccdcfg.c ****
73:..\src/mpc5500_ccdcfg.c **** cfg_PBRIDGE(); /* Configure PBRIDGE_A and PBRIDGE_B. */
74:..\src/mpc5500_ccdcfg.c ****
75:..\src/mpc5500_ccdcfg.c **** cfg_XBAR(); /* Configure the XBAR master/slave channel priorities. */
76:..\src/mpc5500_ccdcfg.c **** }
77:..\src/mpc5500_ccdcfg.c ****
78:..\src/mpc5500_ccdcfg.c ****
79:..\src/mpc5500_ccdcfg.c **** } /* End of cfg_mpc5500ccd() */
GAS LISTING E:\sys_temp/cceekcaa.s page 3
32 wz %r11,0(%r1)
33 0020 81610000 lwz %r0,4(%r11)
34 0024 800B0004 mtlr %r0
35 0028 7C0803A6 lwz %r31,-4(%r11)
36 002c 83EBFFFC mr %r1,%r11
37 0030 7D615B78 blr
38 0034 4E800020 .LFE2:
39 .size cfg_mpc5500ccd, .-cfg_mpc5500ccd
40 .align 2
41 .globl cfg_XCLKS
42 .type cfg_XCLKS, @function
43 cfg_XCLKS:
44 .LFB3:
45 .loc 1 98 0
80:..\src/mpc5500_ccdcfg.c ****
81:..\src/mpc5500_ccdcfg.c ****
82:..\src/mpc5500_ccdcfg.c **** /**************************************************************************/
83:..\src/mpc5500_ccdcfg.c **** /* C Code Functions */
84:..\src/mpc5500_ccdcfg.c **** /**************************************************************************/
85:..\src/mpc5500_ccdcfg.c ****
86:..\src/mpc5500_ccdcfg.c ****
87:..\src/mpc5500_ccdcfg.c **** /*************************************************************************/
88:..\src/mpc5500_ccdcfg.c **** /* FUNCTION : cfg_XCLKS */
89:..\src/mpc5500_ccdcfg.c **** /* PURPOSE : This function configures the external clocks (CLKOUT */
90:..\src/mpc5500_ccdcfg.c **** /* and ENGCLK). The PCRs are also set for these 2 pins. */
91:..\src/mpc5500_ccdcfg.c **** /* INPUT NOTES : I_CFG_XCLKS -- used to permit external clock changes. */
92:..\src/mpc5500_ccdcfg.c **** /* Defined in mpc5500_usrccdcfg.h */
93:..\src/mpc5500_ccdcfg.c **** /* RETURN NOTES : None */
94:..\src/mpc5500_ccdcfg.c **** /* WARNING : None */
95:..\src/mpc5500_ccdcfg.c **** /*************************************************************************/
96:..\src/mpc5500_ccdcfg.c ****
97:..\src/mpc5500_ccdcfg.c **** void cfg_XCLKS()
98:..\src/mpc5500_ccdcfg.c **** {
46 %r1)
47 0038 9421FFF0 .LCFI4:
48 stw %r31,12(%r1)
49 003c 93E1000C .LCFI5:
50 mr %r31,%r1
51 0040 7C3F0B78 .LCFI6:
52 .loc 1 105 0
99:..\src/mpc5500_ccdcfg.c ****
100:..\src/mpc5500_ccdcfg.c **** /* This function configures the external clocks */
101:..\src/mpc5500_ccdcfg.c **** /* Engineering clock is set to divide by 128 */
102:..\src/mpc5500_ccdcfg.c **** /* CLKOUT is set to divide-by-2 */
103:..\src/mpc5500_ccdcfg.c ****
104:..\src/mpc5500_ccdcfg.c **** /* Set the value for Pad Configuration Register (PCR214) for ENGCLK */
105:..\src/mpc5500_ccdcfg.c **** SIU.PCR[214].R = (OBE_ENGCLK_VAL | DSC_ENGCLK_VAL);
53 9,0xc3f9
54 0044 3D20C3F9 li %r0,0
55 0048 38000000 sth %r0,492(%r9)
56 004c B00901EC .loc 1 109 0
106:..\src/mpc5500_ccdcfg.c ****
107:..\src/mpc5500_ccdcfg.c ****
108:..\src/mpc5500_ccdcfg.c **** /* Set the value for Pad Configuration Register (PCR229) for CLKOUT */
109:..\src/mpc5500_ccdcfg.c **** SIU.PCR[229].R = (OBE_CLKOUT_VAL | DSC_CLKOUT_VAL);
57 %r9,0xc3f9
58 0050 3D20C3F9 li %r0,704
GAS LISTING E:\sys_temp/cceekcaa.s page 4
59 0054 380002C0 sth %r0,522(%r9)
60 0058 B009020A .loc 1 113 0
110:..\src/mpc5500_ccdcfg.c ****
111:..\src/mpc5500_ccdcfg.c **** /* Set the value for the external clocks */
112:..\src/mpc5500_ccdcfg.c ****
113:..\src/mpc5500_ccdcfg.c **** SIU.ECCR.R = (ECCR_ENGDIV | ECCR_EBTS | ECCR_EBDF);
61 %r9,0xc3f9
62 005c 3D20C3F9 li %r0,16129
63 0060 38003F01 stw %r0,2436(%r9)
64 0064 90090984 .loc 1 115 0
114:..\src/mpc5500_ccdcfg.c ****
115:..\src/mpc5500_ccdcfg.c **** } /* End of cfg_XCLKS */
65 %r11,0(%r1)
66 0068 81610000 lwz %r31,-4(%r11)
67 006c 83EBFFFC mr %r1,%r11
68 0070 7D615B78 blr
69 0074 4E800020 .LFE3:
70 .size cfg_XCLKS, .-cfg_XCLKS
71 .align 2
72 .globl cfg_PCR
73 .type cfg_PCR, @function
74 cfg_PCR:
75 .LFB4:
76 .loc 1 131 0
116:..\src/mpc5500_ccdcfg.c ****
117:..\src/mpc5500_ccdcfg.c **** /******************************************************************/
118:..\src/mpc5500_ccdcfg.c **** /* FUNCTION : cfg_PCR */
119:..\src/mpc5500_ccdcfg.c **** /* PURPOSE : This function configures the SIU PCR's for */
120:..\src/mpc5500_ccdcfg.c **** /* external bus operation. */
121:..\src/mpc5500_ccdcfg.c **** /* INPUT NOTES : None */
122:..\src/mpc5500_ccdcfg.c **** /* RETURN NOTES : None */
123:..\src/mpc5500_ccdcfg.c **** /* WARNING : This function will be skipped if there is */
124:..\src/mpc5500_ccdcfg.c **** /* an external boot. */
125:..\src/mpc5500_ccdcfg.c **** /* Entries for *_C1 and *_C2 are control variables */
126:..\src/mpc5500_ccdcfg.c **** /* Entries for *_CG1 through *_CG4 are Control */
127:..\src/mpc5500_ccdcfg.c **** /* Group numbers. A Control Group is independent */
128:..\src/mpc5500_ccdcfg.c **** /* of the control variables (*_C1,etc.) */
129:..\src/mpc5500_ccdcfg.c **** /* ****************************************************************/
130:..\src/mpc5500_ccdcfg.c **** void cfg_PCR()
131:..\src/mpc5500_ccdcfg.c **** {
77 2(%r1)
78 0078 9421FFE0 .LCFI7:
79 mflr %r0
80 007c 7C0802A6 stw %r31,28(%r1)
81 0080 93E1001C .LCFI8:
82 stw %r0,36(%r1)
83 0084 90010024 .LCFI9:
84 mr %r31,%r1
85 0088 7C3F0B78 .LCFI10:
86 .loc 1 134 0
132:..\src/mpc5500_ccdcfg.c ****
133:..\src/mpc5500_ccdcfg.c **** /* This function configures the Pad Configuration Registers (PCR's) for ADDR[8:31] */
134:..\src/mpc5500_ccdcfg.c **** cfg_PCR_ADDR(PA_A_VAL, OBE_A_VAL, IBE_A_VAL, DSC_A_VAL, ODE_A_VAL, HYS_A_VAL, SRC_A_VAL, WPE_A_
87 stw %r0,8(%r1)
88 008c 38000000 li %r3,1024
89 0090 90010008 li %r4,0
90 0094 38600400 li %r5,0
GAS LISTING E:\sys_temp/cceekcaa.s page 5
91 0098 38800000 li %r6,64
92 009c 38A00000 li %r7,0
93 00a0 38C00040 li %r8,0
94 00a4 38E00000 li %r9,0
95 00a8 39000000 li %r10,0
96 00ac 39200000 bl cfg_PCR_ADDR
97 00b0 39400000 .loc 1 137 0
98 00b4 48000001 li %r0,0
135:..\src/mpc5500_ccdcfg.c ****
136:..\src/mpc5500_ccdcfg.c **** /* This function configures the Pad Configuration Registers (PCR's) for DATA[0:15] */
137:..\src/mpc5500_ccdcfg.c **** cfg_PCR_DATA(PA_DL, OBE_DL, IBE_DL, DSC_DL, ODE_DL, HYS_DL, SRC_DL, WPE_DL, WPS_DL, DATA_BYT_MS
99 r1)
100 00b8 38000000 li %r0,0
101 00bc 90010008 stw %r0,12(%r1)
102 00c0 38000000 li %r3,1024
103 00c4 9001000C li %r4,0
104 00c8 38600400 li %r5,0
105 00cc 38800000 li %r6,64
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