📄 subprogram.asm
字号:
;==================================================================================
; The information contained herein is the exclusive property of
; Sunplus Technology Co. And shall not be distributed, reproduced,
; or disclosed in whole in part without prior written permission.
; (C) COPYRIGHT 2004 SUNPLUS TECHNOLOGY CO.
; ALL RIGHTS RESERVED
; The entire notice above must be reproduced on all authorized copies.
;==================================================================================
;==================================================================================
; Program Name : Subprogram.asm
; Description : data processing for IIC communication
; Reference : SPMC65P2404A/2408A Data Sheet
; Revision history :
;----------------------------------------------------------------------------------
; Version Date Description
; 1.0.0 2004-10-27 First Edition
;==================================================================================
.SYNTAX 6502 ;Process standard 6502 addressing syntax
.LINKLIST ;Generate linklist information
.SYMBOLS ;Generate symbolic debug information
;************************************************************************************
;* *
;* System Register Define *
;* *
;************************************************************************************
;************************************************************************************
.INCLUDE IICMacro.inc
;************************************************************************************
;************************************************************************************
;************************************************************************************
;* *
;* Data memory Define *
;* *
;************************************************************************************
.PAGE0 ;Define values in the range from 00h to FFh
GB_Flag DS 1
GB_RxCnt DS 1
GB_TxCnt DS 1
GB_CSCnt DS 1
GB_INT_Cnt DS 1
GB_SCapacity DS 1 ;the Capacity of data from slaver
GB_TimeCnt1 DS 1
GB_TimeCnt2 DS 1
GB_DisCnt DS 1
GB_Register DS 3
GB_Address_Rx DS 10
GB_Address_Tx DS 10
GP_IIC_BitRate .EQU GB_Register
GP_IIC_RxBuf .EQU GB_Register+1 ;buffer for receivind data
GP_IIC_TxBuf .EQU GB_Register+2 ;buffer for send data
GB_MCommand .EQU GB_Address_Rx ;the command of the master
GB_MData_Addr .EQU GB_Address_Rx+1 ;the head address of data
GB_SCommand .EQU GB_Address_Tx ;the command from the slaver
GB_SData_Addr .EQU GB_Address_Tx+1 ;the head address of data from slaver
;************************************************************************************
.DATA ;Define data storage section
;************************************************************************************
;* *
;* Subprogram Area *
;* *
;************************************************************************************
.CODE
;***********************************************************************************
; system initialize
;
;***********************************************************************************
.PUBLIC F_Sys_Init
F_Sys_Init:
lda #$FF
sta P_SYS_Ctrl
sta P_SYS_Ctrl ;clear the CPU reset flag
lda #C_WDT_Clr
sta P_WDT_Clr
lda #%10110000
sta P_WDT_Ctrl
sta P_WDT_Ctrl
;===================================================================================
; setting the I/O
; PB5,PB4 -----> input with pull-high
;===================================================================================
lda #%00110000
sta P_IOB_Data
lda #%00000000
sta P_IOB_Attrib
lda #%00000000
sta P_IOB_Dir
lda #%00000000
sta P_IOC_Data
lda #%00000000
sta P_IOC_Attrib
lda #%00000000
sta P_IOC_Dir
;===================================================================================
;* setting the Timer
;===================================================================================
lda GP_IIC_BitRate ;f = 8MHz/4/156 = 12.8KHz
sta P_TMR0_1_Ctrl1
lda #100
sta P_TMR0_Preload
lda #C_T2FCS_Div_512 ;8000000/512/32=488Hz=2048us
sta P_TMR2_3_Ctrl1
lda #224
sta P_TMR2_Preload
lda #C_T28B_Timer
sta P_TMR2_3_Ctrl0
;===================================================================================
;* setting the Interrupt
;===================================================================================
lda #00 ;select falling edge trigger
sta P_IRQ_Opt1
sta P_IRQ_Opt1
lda #C_INT_IRQ0IE ;enable IRQ0
sta P_INT_Ctrl0
lda #C_INT_T0OIE
sta P_INT_Ctrl1 ;enable Timer0 overflow interrupt
lda #$FF
sta P_INT_Flag0
sta P_INT_Flag1 ;Clear INT request flag
;===================================================================================
;* var initialize
;===================================================================================
lda #0
sta GB_TxCnt
sta GB_RxCnt
sta GB_CSCnt
sta GB_INT_Cnt
sta GB_DisCnt
sta GB_TimeCnt1
lda #%00000000
sta GB_MCommand
lda #%10100000 ;bit0-->flag for ACK check
sta GB_Flag ;bit2--->flag for occur stop signal
rts ;bit3--->flag for send data
;bit5--->clear when receive data
;bit6--->set if receive ACK
;bit7--->stop or start flag (0--start,1--stop)
;************************************************************************************
;* *
;* communication *
;* *
;************************************************************************************
.PUBLIC F_WrData
F_WrData:
lda GB_Flag
and #%11100000 ;check if has the start signal
beq ?L_CheckComd
jmp ?L_Rts
?L_CheckComd:
lda GB_MCommand
eor #%11110011 ;the command is right
beq ?L_EnSlaver ;yes
lda #00 ;select falling edge trigger
sta P_IRQ_Opt1
sta P_IRQ_Opt1
lda P_INT_Ctrl0
ora #C_INT_IRQ0IE ;enable IRQ0
sta P_INT_Ctrl0
M_BitSet GB_Flag,7; ;stop flag
lda #0
sta GB_TxCnt
sta GB_RxCnt
jmp ?L_Rts
?L_EnSlaver:
lda GB_Flag
and #%00001000 ;if GB_Flag.3=0 then set the SDA and SCL as output
bne ?L_WrData
lda P_INT_Ctrl0 ;disable IRQ0,IRQ2
and #$FC
sta P_INT_Ctrl0
M_SCL_Output;
M_ClrSCL; ;the SCL export '0'
M_BitSet GB_Flag,3;
M_SDA_Output;
jmp ?L_Rts
?L_WrData:
lda GB_SCapacity
cmp GB_TxCnt
bcc ?L_Stop
M_TxData; ;write the data which is been send to buffer and enable Timer1
M_BitSet GB_Flag,6;
jmp ?L_Rts
?L_Stop:
lda GB_Flag
and #%00000100
beq ?L_ClrSDA
M_SDA_Input;
M_BitClr GB_Flag,2; ;flag for delay which is for occur the stop signal
M_BitSet GB_Flag,5;
M_BitSet GB_Flag,7;
M_BitClr GB_Flag,3;
lda #0
sta GB_RxCnt
sta GB_TxCnt
lda #00 ;select falling edge trigger
sta P_IRQ_Opt1
sta P_IRQ_Opt1
lda P_INT_Ctrl0
ora #C_INT_IRQ0IE ;enable IRQ0
sta P_INT_Ctrl0
jmp ?L_Rts
?L_ClrSDA:
M_ClrSCL;
M_ClrSDA;
nop
nop
nop
nop
M_BitSet GB_Flag,2;
M_SCL_Input; ;set free the SCL
?L_Rts:
rts
;************************************************************************************
;* *
;* check ACK *
;* *
;************************************************************************************
.PUBLIC F_CheckACK
F_CheckACK:
lda GB_Flag
and #%00000001
beq ?L_Rts
lda P_IOB_Data
and #%00010000 ;the SDA is low?
bne ?L_Rts ;No
M_SetSCL; ;set SCL
nop
nop
nop
M_BitClr GB_Flag,0; ;clear the flag of check ACK
M_BitClr GB_Flag,6; ;indicate that one byte data have been send out
M_ClrSCL;
M_SDA_Output;
?L_Rts:
rts
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -