wm9712.h

此压缩包为杰得开发得z228的BSP的源代码,可以实现很多功能,尤其是视频解码有很好的效果.

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//

/*++

THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.

Module Name:

    drv.h   I2C (logical) MDD

Abstract:

   Streams interface driver

Functions:

Notes:

--*/

#ifndef _WM9712_DRV_H_
#define _WM9712_DRV_H_

typedef struct 
{
	int count;
}WM9712_CONTEXT, *PWM9712_CONTEXT;

#define WM9712_WRITE 1
#define WM9712_READ 0

// Size of the AACI hardware register space
#define AACI_HWREGS_SIZE            0x1000

// AACI hardware register offsets
#define AACIReg_Slot1Rx             0x50    // AACISL1RX
#define AACIReg_Slot1Tx             0x54    // AACISL1TX
#define AACIReg_Slot2Rx             0x58    // AACISL2RX
#define AACIReg_Slot2Tx             0x5C    // AACISL2TX
//修改1
#define AACIReg_Slot12Rx             0x60   // AACISL12RX
#define AACIReg_Slot12Tx             0x64    // AACISL12TX
//修改1

#define AACIReg_SlotFlag            0x68    // AACISLFR
#define AACIReg_SlotIntStatus       0x6C    // AACISLISTAT
#define AACIReg_SlotIntEnable       0x70    // AACISLIEN

#define AACIReg_IntClear            0x74    // AACIINTCLR
#define AACIReg_MainControl         0x78    // AACIMAINCR
#define AACIReg_Reset               0x7C    // AACIRESET

#define AACIReg_Channel1FIFO        0x90    // AACIDR1

#define AACIReg_Channel1RxControl   0x00    // AACIRXCR1
#define AACIReg_Channel1TxControl   0x04    // AACITXCR1
#define AACIReg_Channel1Status      0x08    // AACISR1
#define AACIReg_Channel1IntStatus   0x0C    // AACIISR1
#define AACIReg_Channel1IntEnable   0x10    // AACIIE1

#define AACIBit_Slot1Tx_Read        0x80000

/*For AACI_SlotFlag register*/
#define AACIBit_Slot1RXBusy     0x01
#define AACIBit_Slot1TXBusy     0x02
#define AACIBit_Slot2RXBusy     0x04
#define AACIBit_Slot2TXBusy     0x08
#define AACIBit_Slot12RXBusy    0x10
#define AACIBit_Slot12TXBusy    0x20
#define AACIBit_Slot1RXValid    0x40
#define AACIBit_Slot1TXEmpty    0x80
#define AACIBit_Slot2RXValid    0x100
#define AACIBit_Slot2TXEmpty    0x200

/*For AACIMainCR register*/
#define AACIBit_Enable          0x001
#define AACIBit_Slot1RXEnable   0x008
#define AACIBit_Slot1TXEnable   0x010
#define AACIBit_Slot2RXEnable   0x020
#define AACIBit_Slot2TXEnable   0x040
#define AACIBit_Slot12RXEnable  0x080
#define AACIBit_Slot12TXEnable  0x100
#define AACIBit_LoopbackEnable  0x002
#define AACIBit_DMAEnable       0x200

/*For AACIIntEnable register*/
#define AACIBit_TxCIE           0x001
#define AACIBit_RxTIE           0x002
#define AACIBit_TxIE            0x004
#define AACIBit_RxIE            0x008
#define AACIBit_RxOIE           0x010
#define AACIBit_TxUIE           0x020
#define AACIBit_RxTOIE          0x040

/*For AACISR1-4 registers*/
#define AACIBit_RXFIFOEmpty     0x001
#define AACIBit_TXFIFOEmpty     0x002
#define AACIBit_RXFIFOHalfFull  0x004
#define AACIBit_TXFIFOHalfEmpty 0x008
#define AACIBit_RXFIFOFull      0x010
#define AACIBit_TXFIFOFull      0x020
#define AACIBit_RXFIFOBusy      0x040
#define AACIBit_TXFIFOBusy      0x080
#define AACIBit_RXOverrun       0x100
#define AACIBit_TXUnderrun      0x200

/*For AACITXCR1-4 and AACIRXCR1-4 registers*/
#define AACIBit_EnableCompactMode   0x8000
#define AACIBit_EnableFIFO          0x01
#define AACIBit_EnableFIFOMode      0x10000
#define AACIBit_Slot3DataInFIFO     0x08
#define AACIBit_Slot4DataInFIFO     0x10
#define AACIBit_Slot1DataInFIFO     0x02
#define AACIBit_Slot2DataInFIFO     0x04

#define AACIBit_DataSizeMask        0x6000
#define AACIBit_DataSize20bits      0x4000
#define AACIBit_DataSize18bits      0x2000
#define AACIBit_DataSize16bits      0x0000
#define AACIBit_DataSize12bits      0x6000

/*For AACIINTCLR */
#define AACIBit_RxTOFEC1            0x0200
#define AACIBit_TxUEC1              0x0020
#define AACIBit_RxOEC1              0x0002
#define AACIBit_ClearAllInts        0x1FFF

// Codec register offsets
#define LM4549A_RESET               0x00
#define LM4549A_MASTER_VOLUME       0x02
#define LM4549A_LINE_LEV_OUT_VOL    0x04
#define LM4549A_MASTER_VOLUME_MONO  0x06
//add junxz
#define LM4549A_BASS_CONTROL  0x08
#define LM4549A_3D_ENABLE  0x20
#define LM4549A_3D_CONTROL  0x22
//add junxz
#define LM4549A_PC_BEEP_VOLUME      0x0A
#define LM4549A_PHONE_VOLUME        0x0C
#define LM4549A_MIC_VOLUME          0x0E
#define LM4549A_LINE_IN_VOLUME      0x10
#define LM4549A_CD_VOLUME           0x12
#define LM4549A_VIDEO_VOLUME        0x14
#define LM4549A_AUX_VOLUME          0x16
#define LM4549A_PCM_OUT_VOL         0x18
#define LM4549A_RECORD_SELECT       0x1A
#define LM4549A_RECORD_GAIN         0x1C
#define LM4549A_GENERAL_PURPOSE     0x20
#define LM4549A_3D_CONTROL          0x22
#define LM4549A_POWERDOWN_CTRL_STAT 0x26
#define LM4549A_EXT_AUDIO_ID        0x28
#define LM4549A_EXT_AUDIO_CTRL_STAT 0x2A
#define LM4549A_PCM_FRONT_DAC_RATE  0x2C
#define LM4549A_PCM_ADC_RATE        0x32
#define LM4549A_ALC_CONTROl  0x60
#define LM4549A_NOISE_GSTE    0x62
#define LM4549A_VENDOR_ID1          0x7C
#define LM4549A_VENDOR_ID2          0x7E

#define LM4549A_BIT_VOLUME_MUTE     0x8000
#define LM4549A_BIT_VOLUME_GAIN     0x0040

#define LM4549A_MASK_VOLUME         0x3F
#define LM4549A_FUNC_VOLUME_R(v)    ((v) & LM4549A_MASK_VOLUME)
#define LM4549A_FUNC_VOLUME_L(v)    (((v) >> 8) & LM4549A_MASK_VOLUME)

#define LM4549A_MUTEVOL_RL          0x2020

#include "platform.h"

#endif //_WM9712_DRV_H_