mpmcinit.inc

此压缩包为杰得开发得z228的BSP的源代码,可以实现很多功能,尤其是视频解码有很好的效果.

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;   to Jade Technologies Co., Ltd.  It is subjected to the terms of a
;   License Agreement between Licensee and Jade Technologies Co., Ltd.
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;   and transfer.  Each of the embodiments, including this information 
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;   Copyright (c) 2004 - 2005 Jade Technologies Co., Ltd. 
;   All rights reserved.



; Mpmc Dynamic Memory Config
; --------------------------

MPMC_Base               EQU 0x2000D000
MPMC_Base_Plus_256      EQU 0x2000D100
MPMC_Base_Plus_1024     EQU 0x2000D400
MPMC_Base_Plus_1152     EQU 0x2000D480

Z228_MPMC_BASE					EQU 0x2000D000
Z228_MPMCDyControl			EQU 0x2000D020
Z228_MPMCDyRefresh			EQU 0x2000D024
Z228_MPMCDyReadConfig		EQU 0x2000D028
Z228_MPMCDytRP 					EQU 0x2000D030
Z228_MPMCDytRAS					EQU 0x2000D034
Z228_MPMCDytSREX				EQU 0x2000D038
Z228_MPMCDytWR					EQU 0x2000D044
Z228_MPMCDytRC					EQU 0x2000D048
Z228_MPMCDytRFC					EQU 0x2000D04C
Z228_MPMCDytXSR					EQU 0x2000D050
Z228_MPMCDytRRD					EQU 0x2000D054
Z228_MPMCDytMRD					EQU 0x2000D058
Z228_MPMCDytCDLR				EQU 0x2000D05C
Z228_MPMCDyConfig0			EQU 0x2000D100
Z228_MPMCDyRasCas0			EQU 0x2000D104
Z228_MPMCDyConfig1			EQU 0x2000D120
Z228_MPMCDyRasCas1			EQU 0x2000D124

Z228_MPMCAHBTimeOut0		EQU 0x2000D408
Z228_MPMCAHBTimeOut5		EQU 0x2000D4A8
Z228_MPMCAHBTimeOut7		EQU 0x2000D4E8

Z228_MPMCDyConfig_Value	EQU	0x4680
Z228_MPMCDyRasCas_Value EQU	0x203
Z228_MPMCDyControl_Value1 EQU	0x183
Z228_MPMCDyControl_Value2 EQU	0x103	
Z228_MPMCDyControl_Value3 EQU	0x83

Z228_SDRAM_READ1				EQU 0x08040000
Z228_SDRAM_READ2				EQU 0x10040000


; Define constants
; ----------------

ModeRegAddr             EQU 0x40000       ; Define Mode Register address, used when reading from rams

SDRAMBank4BaseAddr      EQU 0x00000000                          ; Define SDRAM Bank 4 base addr
SDRAMBank4BaseAddrMod   EQU 0x04000000                          ; Define SDRAM Bank 4 base addr
SDRAM4ModeRegAddr       EQU SDRAMBank4BaseAddrMod + ModeRegAddr ; Define SDRAM Bank 4 mode register addr

SDRAMBank5BaseAddr      EQU 0x08000000                          ; Define SDRAM Bank 5 base addr
SDRAM5ModeRegAddr       EQU SDRAMBank5BaseAddr + ModeRegAddr    ; Define SDRAM Bank 5 mode register addr

	END