📄 fw_utils.lst
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ARM macroassembler Page:1
1 00000000 ;
2 00000000 ; The content of this file or document is CONFIDENTIAL and PROPRIETARY
3 00000000 ; to Jade Technologies Co., Ltd. It is subjected to the terms of a
4 00000000 ; License Agreement between Licensee and Jade Technologies Co., Ltd.
5 00000000 ; restricting among other things, the use, reproduction, distribution
6 00000000 ; and transfer. Each of the embodiments, including this information
7 00000000 ; and any derivative work shall retain this copyright notice.
8 00000000 ;
9 00000000 ; Copyright (c) 2004 - 2005 Jade Technologies Co., Ltd.
10 00000000 ; All rights reserved.
11 00000000 ; ----------------------------------------------------------------
12 00000000 ; File: fw_utils.s,v
13 00000000 ; Revision: 1.0
14 00000000 ; ----------------------------------------------------------------
15 00000000 ; $
16 00000000 ;
17 00000000 ; Module Name:
18 00000000 ;
19 00000000 ; fw_utils.s
20 00000000 ;
21 00000000 ; Abstract:
22 00000000 ;
23 00000000 ; This module implements the code necessary to initialize the HW and
24 00000000 ; Kernel interface routines.
25 00000000 ;
26 00000000 ; oalfuncs.h contains the C function declarations.
27 00000000 ;
28 00000000
29 00000000 ;
30 00000000 ; This one source file is used to provide Startup code both for the
31 00000000 ; Ethernet Boot Loader, and for the WinCE kernel. The default is to
32 00000000 ; build for the WinCE kernel
33 00000000 ;
34 00000000 IF :LNOT: :DEF: EBOOT
35 00000000 GBLL EBOOT
36 00000000 EBOOT SETL {FALSE}
37 00000000 ENDIF
38 00000000 IF :LNOT: :DEF: EXEFLASH
39 00000000 GBLL EXEFLASH
40 00000000 EXEFLASH SETL {FALSE}
41 00000000 ENDIF
42 00000000
53 00000000 OPT 1 ; reenable listing
54 00000000
55 00000000 TEXTAREA
43 AREA |.text|,ALIGN=2,CODE,READONLY
44 00000000 AreaName SETS "|.text|"
56 00000000
57 00000000 ; **********************************************************************
58 00000000 ; *
59 00000000 ; * uSecsWait - uses timer2 to wait for a given number of microseconds
60 00000000 ; *
61 00000000 ; * NOTE: This routine takes no care to preserve current timer state
62 00000000 ; *
63 00000000 ; * void uSecsWait(unsigned int usecs, unsigned int virtoffset);
64 00000000 ; *
65 00000000 ; ****************************************************************************
66 00000000
67 00000000 LEAF_ENTRY uSecsWait
173 00000000 FuncName SETS VBar:CC:"uSecsWait":CC:VBar
174 00000000 PrologName SETS "Invalid Prolog"
175 00000000 FuncEndName SETS VBar:CC:"uSecsWait":CC:"_end":CC:VBar
176 00000000 ALIGN 2
177 00000000 EXPORT |uSecsWait|
178 00000000 |uSecsWait|
179 00000000 ROUT
68 00000000
69 00000000 ; check that we are being asked to wait
70 00000000 e3500000 cmp r0, #0
71 00000004
72 00000004 RETURN_EQ
49 00000004 012fff1e bxeq lr
73 00000008
74 00000008 ; point r1 at timer 2 control registers
75 00000008 e59f20a4 ldr r2, =PHYS_TIMER2_BASE
76 0000000c e0811002 add r1, r1, r2
77 00000010
78 00000010 e5912008 ldr r2, [r1, #TIMER_Control]
79 00000014 e3c220ef and r2, r2, #TIMER_RESERVED_MASK ; may not modify these bits.
80 00000018
81 00000018 ; Timer mode: disabled, 32 bit, one-shot, free-running, no int
82 00000018 e3822003 orr r2, r2, #TIMER_MODE_ONESHOT | TIMER_MODE_32BIT
83 0000001c e5812008 str r2, [r1, #TIMER_Control]
84 00000020
85 00000020 ;
86 00000020 e5810000 str r0, [r1, #TIMER_Load]
87 00000024
88 00000024 e3822080 orr r2, r2, #TIMER_ENABLE
89 00000028 e5812008 str r2, [r1, #TIMER_Control]
90 0000002c
91 0000002c ; read the current timer register value, and check whether it reached
92 0000002c ; zero
93 0000002c msloop
94 0000002c e5912004 ldr r2, [r1, #TIMER_Value]
95 00000030 e3520000 cmp r2, #0
96 00000034 1afffffc bne msloop
97 00000038
98 00000038 ; OK - turn counter off and return
99 00000038 e5912008 ldr r2, [r1, #TIMER_Control]
100 0000003c e3c220ef and r2, r2, #TIMER_RESERVED_MASK ; may not modify these bits.
101 00000040 e5812008 str r2, [r1, #TIMER_Control]
102 00000044
103 00000044 RETURN
44 00000044 e12fff1e bx lr
104 00000048
105 00000048 ENTRY_END uSecsWait
192 00000048 |uSecsWait_end|
106 00000048
107 00000048 ; ****************************************************************************
108 00000048
109 00000048
110 00000048 ; ****************************************************************************
111 00000048 ; * GetPC
112 00000048 ; *
113 00000048 ; * Used to obtain the current PC value
114 00000048 ; *
115 00000048 ; ****************************************************************************
116 00000048
117 00000048 IF EBOOT :LOR: :LNOT: EXEFLASH
118 00000048 LEAF_ENTRY GetPC
173 00000048 FuncName SETS VBar:CC:"GetPC":CC:VBar
174 00000048 PrologName SETS "Invalid Prolog"
175 00000048 FuncEndName SETS VBar:CC:"GetPC":CC:"_end":CC:VBar
176 00000048 ALIGN 2
177 00000048 EXPORT |GetPC|
178 00000048 |GetPC|
179 00000048 ROUT
119 00000048 e1a0000f mov r0, pc
120 0000004c RETURN
44 0000004c e12fff1e bx lr
121 00000050 ENTRY_END GetPC
192 00000050 |GetPC_end|
122 00000050 ENDIF
123 00000050
124 00000050
125 00000050 ; ****************************************************************************
126 00000050 ; * WFI
127 00000050 ; *
128 00000050 ; * Called by OEMIdle when we are idle. Stops core until next interrupt
129 00000050 ; * This imlementation includes workarounds for cacheable code.
130 00000050 ; * See ARM926EJ-S Rev0.3 Errata List. CP023-PRDC-001555 5.0.
131 00000050 ;
132 00000050 ; * If the WFI instruction is run from non-cacheable region, and located at an
133 00000050 ; * offset of between 0x3E8 and 0x3F4 (inclusive) from the previous 1KB
134 00000050 ; * boundary, then the WFI will execute with the prefetch buffer in a non-full
135 00000050 ; * state, and low-power state will not be entered correctly.
136 00000050
137 00000050 ; * For the workaround to operate correctly, the instruction which disables
138 00000050 ; * the cache, must be offset from the previous 1KB boundary by less then 0x3E4.
139 00000050 ; *
140 00000050 ; ****************************************************************************
141 00000050
142 00000050 LEAF_ENTRY WFI
173 00000050 FuncName SETS VBar:CC:"WFI":CC:VBar
174 00000050 PrologName SETS "Invalid Prolog"
175 00000050 FuncEndName SETS VBar:CC:"WFI":CC:"_end":CC:VBar
176 00000050 ALIGN 2
177 00000050 EXPORT |WFI|
178 00000050 |WFI|
179 00000050 ROUT
143 00000050
144 00000050 e3a00000 mov r0, #0
145 00000054 ee070f9a mcr p15, 0, r0, c7, c10, 4 ; Drain write buffer
146 00000058 e10f2000 mrs r2, CPSR ; Grab CPSR contents
147 0000005c e38230c0 orr r3, r2, #3 :SHL: 6 ; Turn off IRQ and FIQ inputs
148 00000060 ee110f10 mrc p15, 0, r0, c1, c0, 0 ; Read control register
149 00000064 e3c01a01 bic r1, r0, #1<<12 ; Clear the Enable I Cache bit
150 00000068 e121f003 msr CPSR_c, r3 ; Disable interrupts
151 0000006c
152 0000006c e59f3044 ldr r3, =TestMemoryLocationLabel; If this is >996 bytes or <1020, then
153 00000070 ; WFI will not function correctly
154 00000070 e2033fff and r3, r3, #0x3FC
155 00000074 e3530e3e cmp r3, #0x3E0 ;
156 00000078
157 00000078 ; Branch to the second code set if the first one is near the bottom of 1kb
158 00000078 ; boundary. This guarantees that WFI instruction will be issued at the proper
159 00000078 ; offset and the processor will be fully switched into core stop mode.
160 00000078
161 00000078 aa000007 bge WaitForInterruptOffset ; Branch if greater than
162 0000007c
163 0000007c ; Put the system into low-power state by issuing Disable I Cache and WFI instructions.
164 0000007c
165 0000007c e3a03000 mov r3, #0 ; This needs to be 0 (SBZ) see ARM926EJ-S TRM
166 00000080
167 00000080 TestMemoryLocationLabel
168 00000080 ee011f10 mcr p15, 0, r1, c1, c0, 0 ; Disable ICache
169 00000084 ee073f90 mcr p15, 0, r3, c7, c0, 4 ; WFI
170 00000088
171 00000088 ea000006 b EndOfWFI
172 0000008c e1a00000 nop ; Make some space in the code
173 00000090 e1a00000 nop ; to bridge the 1024 byte boundary
174 00000094 e1a00000 nop
175 00000098 e1a00000 nop
176 0000009c
177 0000009c WaitForInterruptOffset ; This label is 10 words after the cmp instruction
178 0000009c ; which satisfies the requiremnt of a worst-case
179 0000009c ; alignment where it is 996>WFI<1020 bytes from.
180 0000009c
181 0000009c e3a03000 mov r3, #0 ; This needs to be 0 (SBZ) see ARM926EJ-S TRM
182 000000a0 ee011f10 mcr p15, 0, r1, c1, c0, 0 ; Disable I cache
183 000000a4 ee073f90 mcr p15, 0, r3, c7, c0, 4 ; Wait for Interrupt
184 000000a8
185 000000a8 EndOfWFI
186 000000a8
187 000000a8 ee010f10 mcr p15, 0, r0, c1, c0, 0 ; Re-enable ICache
188 000000ac e121f002 msr CPSR_c, r2 ; Re-enable previous interrupt state
189 000000b0 RETURN
44 000000b0 e12fff1e bx lr
190 000000b4
191 000000b4 ENTRY_END WFI
192 000000b4 |WFI_end|
192 000000b4
193 000000b4 ; ****************************************************************************
194 000000b4
195 000000b4
196 000000b4 IF :DEF: EXAMPLE_MEMCONFIG
562 000000b4 ENDIF ; EXAMPLE_MEMCONFIG
563 000000b4
564 000000b4
565 000000b4
566 000000b4 IF :DEF: EXAMPLE_POWERDOWN
1022 000000b4 ENDIF ; EXAMPLE_POWERDOWN
1023 000000b4
1024 000000b4 END
1025 000000b4 20023000 *literal pool: constant
1025 000000b8 00000080 *literal pool: symbol: TestMemoryLocationLabel + 0x0
Assembly terminated, errors: 0, warnings: 0
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