📄 fw_arm.lst
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ARM macroassembler Page:1
1 00000000 ;
2 00000000 ; The content of this file or document is CONFIDENTIAL and PROPRIETARY
3 00000000 ; to Jade Technologies Co., Ltd. It is subjected to the terms of a
4 00000000 ; License Agreement between Licensee and Jade Technologies Co., Ltd.
5 00000000 ; restricting among other things, the use, reproduction, distribution
6 00000000 ; and transfer. Each of the embodiments, including this information
7 00000000 ; and any derivative work shall retain this copyright notice.
8 00000000 ;
9 00000000 ; Copyright (c) 2004 - 2005 Jade Technologies Co., Ltd.
10 00000000 ; All rights reserved.
11 00000000 ; ----------------------------------------------------------------
12 00000000 ; File: fw_arm.s,v
13 00000000 ; Revision: 1.0
14 00000000 ; ----------------------------------------------------------------
15 00000000 ; $
16 00000000 ;
17 00000000 ;
18 00000000 ; Module Name:
19 00000000 ;
20 00000000 ; fw_arm.s
21 00000000 ;
22 00000000 ; Abstract:
23 00000000 ;
24 00000000 ; This module implements the code necessary to initialize the HW and
25 00000000 ; Kernel interface routines.
26 00000000 ;
27 00000000
28 00000000
29 00000000 ;
30 00000000 ; This one source file is used to provide Startup code both for the
31 00000000 ; Ethernet Boot Loader, and for the WinCE kernel. The default is to
32 00000000 ; build for the WinCE kernel
33 00000000 ;
34 00000000
35 00000000 IF :LNOT: :DEF: EBOOT
36 00000000 GBLL EBOOT
37 00000000 EBOOT SETL {FALSE}
38 00000000 ENDIF
39 00000000 IF :LNOT: :DEF: EXEFLASH
40 00000000 GBLL EXEFLASH
41 00000000 EXEFLASH SETL {FALSE}
42 00000000 ENDIF
43 00000000
56 00000000 OPT 1 ; enable listing in fw_arm.lst
57 00000000
58 00000000 IMPORT ARMInitSerial
59 00000000 IMPORT ARMPutHex
60 00000000 IMPORT ARMWriteString
61 00000000
62 00000000
63 00000000 IF EBOOT
65 00000000 ELSE
66 00000000 IMPORT KernelStart
67 00000000 ENDIF
68 00000000
69 00000000 IF EBOOT :LOR: :LNOT:EXEFLASH
70 00000000 IMPORT EverythingRelocate
71 00000000 ENDIF
72 00000000
73 00000000 IF :DEF: EXAMPLE_MEMCONFIG
75 00000000 ENDIF
76 00000000
77 00000000 CP15ControlInit EQU 0xc0001078 ; Async. Bus mode
78 00000000 ; I-Cache enabled
79 00000000 ; Little-Endian
80 00000000 ; MMU Disabled
81 00000000
82 00000000 STARTUPTEXT
55 AREA |.astart|,ALIGN=2,CODE
56 00000000 AreaName SETS "|.astart|"
83 00000000 LEAF_ENTRY StartUp
173 00000000 FuncName SETS VBar:CC:"StartUp":CC:VBar
174 00000000 PrologName SETS "Invalid Prolog"
175 00000000 FuncEndName SETS VBar:CC:"StartUp":CC:"_end":CC:VBar
176 00000000 ALIGN 2
177 00000000 EXPORT |StartUp|
178 00000000 |StartUp|
179 00000000 ROUT
84 00000000
85 00000000 ; There are two ways into StartUp: from the bootmonitor/reset or from
86 00000000 ; wake up. In either case, the processor should be in a privileged mode
87 00000000 ; (e.g. SVC) with the MMU disabled. If the MMU might be active, there
88 00000000 ; needs to be code to ensure that the executable is still at the next
89 00000000 ; address when the MMU is turned off.
90 00000000 ;
91 00000000
92 00000000 ; disable all interrupts, set SVC mode
93 00000000 e3a000d3 mov r0, #(SVC32Mode :OR: NoINTS)
94 00000004 e121f000 msr cpsr_c, r0
95 00000008
96 00000008 IF EBOOT
164 00000008 ENDIF
165 00000008 ;**************************************
166 00000008 ;
167 00000008 ; Here is a good place to do any speed (CPU, memory etc) setup
168 00000008 ; We do not do any here as the boot monitor is used to do this for now
169 00000008 ;
170 00000008 ;zq we use 32k ref_clk
171 00000008 ; Set all the timers to 1MHz
172 00000008 INIT
173 00000008 e59f025c ldr r0, =PHYS_SC_BASE
174 0000000c e5901000 ldr r1, [r0, #ARM_SCCtrl]
175 00000010 e38119aa orr r1, r1, #(SCCtrlTimer0EnSel :OR: SCCtrlTimer1EnSel :OR: SCCtrlTimer2EnSel :OR: SCCtrlTimer3EnSel)
176 00000014 e5801000 str r1, [r0, #ARM_SCCtrl]
177 00000018
178 00000018 ContinueSetup
179 00000018
180 00000018 ; Only used temporarily, but setup a stack for use by 'C' routines;
181 00000018 ; Use only the first 32KB of the area. Remember this is a full descending
182 00000018 ; based stack.
183 00000018 e59fd250 ldr sp, =TEMP_STACK_BASE
184 0000001c
185 0000001c
186 0000001c
187 0000001c IF :DEF: EXAMPLE_MEMCONFIG
189 0000001c ENDIF
190 0000001c
191 0000001c ; Now reset all CP15 features
192 0000001c e59f0250 ldr r0, =CP15ControlInit
193 00000020 WRMMU_STATE r0
77 00000020 ee010f10 MCR p15, 0, r0, c1, c0 ,0
194 00000024
195 00000024 e3a00000 mov r0, #0x0
196 00000028 WRMMU_FlushTB r0 ; flush TLBs
196 00000028 ee080f17 MCR p15,0,r0,c8,c7,0
197 0000002c WRCACHE_FlushIDC r0 ; flush caches
86 0000002c ee070f17 MCR p15,0,r0,c7,c7,0
198 00000030
199 00000030 ; Example code to support remapping to flash after a reset
200 00000030 IF :DEF: EXAMPLE_FLASHREMAP
204 00000030 ENDIF
205 00000030
206 00000030 DISABLE_INTS r0, r1 ; Ints -> IRQ; LEDs
75 00000030
76 00000030 ;
77 00000030 ; Explicitly disable the standard (non-debug) UARTs from interrupting
78 00000030 ; This code relies on the fact that all the UART registers are
79 00000030 ; mapped into seperate dwords.
80 00000030 ;
81 00000030
82 00000030 e59f0240 LDR r0, =PHYS_UART0_BASE
83 00000034 e3a01000 LDR r1, =0 ; disable UART
84 00000038 e5c01030 STRB r1, [r0, #PL011_CR]
85 0000003c
86 0000003c e59f0238 LDR r0, =PHYS_UART1_BASE
87 00000040 e3a01000 LDR r1, =0 ; disable UART
88 00000044 e5c01030 STRB r1, [r0, #PL011_CR]
89 00000048
207 00000048
208 00000048 IF EBOOT :LOR: :LNOT:EXEFLASH
209 00000048 ;
210 00000048 ; Relocate code from Flash to RAM if necessary. This step is required
211 00000048 ; for EBOOT as it's code runs from physical, not virtual, addresses. It
212 00000048 ; is optional for Win CE, though running from RAM increases performance
213 00000048 ;
214 00000048 ; Returns with r0 = linked address for Startup, -1 if currently
215 00000048 ; executing in the correct place
216 00000048 ;
217 00000048
218 00000048 ; NOTE: Since the eboot/nk image is built to execute from RAM but we're
219 00000048 ; currently executing out of flash, make sure this call is a relative
220 00000048 ; branch. Once the code is relocated to RAM, absolute address references
221 00000048 ; are fine.
222 00000048 ;
223 00000048 ; The branch with link instruction will do a relative branch and since we
224 00000048 ; don't care about Thumb/ARM mode switching, it works fine here.
225 00000048 ;
226 00000048 eb000000 bl EverythingRelocate
227 0000004c
228 0000004c ; branch to final execution address if necessary
229 0000004c e3700001 cmp r0, #-1
230 00000050 12800058 addne r0, r0, #(RealStartup - StartUp)
231 00000054 11a0f000 movne pc, r0
232 00000058
233 00000058 ENDIF
234 00000058
235 00000058 RealStartup
236 00000058
237 00000058 ; init the debug serial port and say "hello".
238 00000058 eb000000 bl ARMInitSerial
239 0000005c
240 0000005c ;add by shzhang
241 0000005c ; Wait > 100 ms
242 0000005c e3a00b7d mov r0, #128000
243 00000060 e2400001 w100 sub r0, r0, #1
244 00000064 e3500001 cmp r0,#1
245 00000068 1afffffc bne w100
246 0000006c
247 0000006c e28f002c adr r0, HelloMsg
248 00000070 eb000000 bl ARMWriteString
249 00000074
250 00000074 e28f0054 adr r0, StackMsg
251 00000078 eb000000 bl ARMWriteString
252 0000007c e1a0000d mov r0, sp
253 00000080 eb000000 bl ARMPutHex
254 00000084
255 00000084 e28f0056 adr r0, EndMsg
256 00000088 eb000000 bl ARMWriteString
257 0000008c
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