📄 lcd.asm
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;*******************************************************************************
; FILENAME : LCD.ASM
; AUTHOR : SONiX
; PURPOSE : Test LCD function. In order to enable LCD function, first we enable
; the LCD controller by Code Option to enable COM0~COM2, SEG16~SEG23.
; Second, enable segment pin share with P3 and P6. Finally, the value
; we want to show are written into RAM Bank 15.
; REVISION : 28/01/2003 V1.0 First issue
;*******************************************************************************
;* (c) Copyright 2003, SONiX TECHNOLOGY CO., LTD.
;*******************************************************************************
CHIP SN8P1808 ; Select the CHIP
//{{SONIX_CODE_OPTION
.Code_Option OSG Enable
.Code_Option High_Clk 4M_X'tal
.Code_Option High_Clk/2 Disable
.Code_Option Security Enable
.Code_Option LVD Enable
.Code_Option LCD Enable
.Code_Option Watch_Dog Enable
//}}SONIX_CODE_OPTION
;-------------------------------------------------------------------------------
; Include Files
;-------------------------------------------------------------------------------
.nolist ; do not list the macro file
INCLUDESTD MACRO1.H
INCLUDESTD MACRO2.H
INCLUDESTD MACRO3.H
.list ; Enable the listing function
;-------------------------------------------------------------------------------
; Constants Definition
;-------------------------------------------------------------------------------
; ONE EQU 1
num0_1 equ 0feH
num0_2 equ 0fdH
num0_3 equ 0feH
num1_1 equ 0feH
num1_2 equ 0f8H
num1_3 equ 0f8H
num2_1 equ 0faH
num2_2 equ 0ffH
num2_3 equ 0fcH
num3_1 equ 0feH
num3_2 equ 0ffH
num3_3 equ 0f8H
num4_1 equ 0feH
num4_2 equ 0faH
num4_3 equ 0faH
num5_1 equ 0fcH
num5_2 equ 0ffH
num5_3 equ 0faH
num6_1 equ 0fcH
num6_2 equ 0feH
num6_3 equ 0feH
num7_1 equ 0feH
num7_2 equ 0f9H
num7_3 equ 0f8H
num8_1 equ 0feH
num8_2 equ 0ffH
num8_3 equ 0feH
num9_1 equ 0feH
num9_2 equ 0fbH
num9_3 equ 0faH
;-------------------------------------------------------------------------------
; Variables Definition
;-------------------------------------------------------------------------------
.DATA
org 0h ;Bank 0 data section start from RAM address 0x000
Wk00B0 DS 1 ;Temporary buffer for main loop
Iwk00B0 DS 1 ;Temporary buffer for ISR
AccBuf DS 1 ;Accumulater buffer
PflagBuf DS 1 ;PFLAG buffer
org 100h ;Bank 1 data section start from RAM address 0x100
BufB1 DS 20 ;Temporary buffer in bank 1
;-------------------------------------------------------------------------------
; Bit Flag Definition
;-------------------------------------------------------------------------------
Wk00B0_0 EQU Wk00B0.0 ;Bit 0 of Wk00B0
Iwk00B0_1 EQU Iwk00B0.1 ;Bit 1 of Iwk00
;-------------------------------------------------------------------------------
; Code section
;-------------------------------------------------------------------------------
.CODE
ORG 0 ;Code section start
jmp Reset ;Reset vector
;Address 4 to 7 are reserved
ORG 8
jmp Isr ;Interrupt vector
ORG 10h
;-------------------------------------------------------------------------------
; Program reset section
;-------------------------------------------------------------------------------
Reset:
mov A,#07Fh ;Initial stack pointer and
b0mov STKP,A ;disable global interrupt
b0mov PFLAG,#00h ;pflag = x,x,x,x,x,c,dc,z
b0mov RBANK,#00h ;Set initial RAM bank in bank 0
mov A,#40h ;Clear watchdog timer and initial system mode
b0mov OSCM,A
call ClrRAM ;Clear RAM
call SysInit ;System initial
b0bset FGIE ;Enable global interrupt
;-------------------------------------------------------------------------------
; Main routine
;-------------------------------------------------------------------------------
Main:
b0bset FWDRST ;Clear watchdog timer
call MnApp
jmp Main
;-------------------------------------------------------------------------------
; Main application
;-------------------------------------------------------------------------------
MnApp:
; Put your main program here
b0bclr fp3lcd ;Enable SEG8~SEG15 shared with P3
b0bclr fp6hseg ;Enable SEG4~SEG7 shared with P6.4~P6.7
b0bclr fp6lseg ;Enable SEG0~SEG3 shared with P6.0~P6.3
b0bset flenb ;LCD driver
b0bclr fblank ;Normal display
b0mov rbank,#0fH ;Get into RAM bank 15
mov A,#num0_1 ;Show value 0
mov 00H,A
mov A,#num0_2
mov 01H,A
mov A,#num0_3
mov 02H,A
ret
;-----------------------------------
; Jump table routine
;-----------------------------------
ORG 0x0100 ;The jump table should start from the head
;of boundary.
b0mov A,Wk00B0
and A,#3
ADD PCL,A
jmp JmpSub0
jmp JmpSub1
jmp JmpSub2
;-----------------------------------
JmpSub0:
; Subroutine 1
jmp JmpExit
JmpSub1:
; Subroutine 2
jmp JmpExit
JmpSub2:
; Subroutine 3
jmp JmpExit
JmpExit:
ret ;Return Main
;-------------------------------------------------------------------------------
; Isr (Interrupt Service Routine)
; Arguments :
; Returns :
; Reg Change:
;-------------------------------------------------------------------------------
/*
Processing multi-interrupt request needs to set the priority of these interrupt requests.
The IRQ flags of the 7 interrupt are controlled by the interrupt event occurring. But the
IRQ flag set doesn't mean the system to execute the interrupt vector. The IRQ flags can be
triggered by the events without interrupt enable. Just only any the event occurs and the
IRQ will be logic "1".
There are two things need to do for multi-interrupt. One is to make a good priority for
these interrupts. Two is using IEN and IRQ flags to decide executing interrupt service
routine or not.
*/
Isr:
;-----------------------------------
; Save ACC and system registers
;-----------------------------------
b0xch A,AccBuf ;B0xch instruction do not change C,Z flag
push ; Save 80h ~ 87h system
;-----------------------------------
; Check which interrupt happen
;-----------------------------------
INTP00CHK: ; Check INT0 interrupt request
B0BTS1 FP00IEN ; Check P00IEN
JMP INTP01CHK ; Jump check to next interrupt
B0BTS0 FP00IRQ ; Check P00IRQ
JMP INTP00 ; Jump to INT0 interrupt service routine
INTP01CHK: ; Check INT1 interrupt request
B0BTS1 FP01IEN ; Check P01IEN
JMP INTP02CHK ; Jump check to next interrupt
B0BTS0 FP01IRQ ; Check P01IRQ
JMP INTP01 ; Jump to INT1 interrupt service routine
INTP02CHK: ; Check INT2 interrupt request
B0BTS1 FP02IEN ; Check P02IEN
JMP INTT0CHK ; Jump check to next interrupt
B0BTS0 FP02IRQ ; Check P02IRQ
JMP INTP02 ; Jump to INT2 interrupt service routine
INTT0CHK: ; Check T0 interrupt request
B0BTS1 FT0IEN ; Check T0IEN
JMP INTTC0CHK ; Jump check to next interrupt
B0BTS0 FT0IRQ ; Check T0IRQ
JMP INTT0 ; Jump to T0 interrupt service routine
INTTC0CHK: ; Check TC0 interrupt request
B0BTS1 FTC0IEN ; Check TC0IEN
JMP INTTC1CHK ; Jump check to next interrupt
B0BTS0 FTC0IRQ ; Check TC0IRQ
JMP INTTC0 ; Jump to TC0 interrupt service routine
INTTC1CHK: ; Check TC1 interrupt request
B0BTS1 FTC1IEN ; Check TC1IEN
JMP INTSIOCHK ; Jump check to next interrupt
B0BTS0 FTC1IRQ ; Check TC1IRQ
JMP INTTC1 ; Jump to TC1 interrupt service routine
INTSIOCHK: ; Check SIO interrupt request
B0BTS1 FSIOIEN ; Check SIOIEN
JMP INT_EXIT ; Jump to exit of IRQ
B0BTS0 FSIOIRQ ; Check SIOIRQ
JMP INTSIO ; Jump to SIO interrupt service routine
;-----------------------------------
; Exit interrupt service routine
;-----------------------------------
INT_EXIT:
pop ; Restore 80h ~ 87h system registers
b0xch A,AccBuf ; B0xch instruction do not change C,Z flag
reti ; Exit the interrupt routine
;-------------------------------------------------------------------------------
; INT0 interrupt service routine
;-------------------------------------------------------------------------------
INTP00:
b0bclr FP00IRQ
;Process P0.0 external interrupt here
jmp INT_EXIT
;-------------------------------------------------------------------------------
; INT1 interrupt service routine
;-------------------------------------------------------------------------------
INTP01:
b0bclr FP01IRQ
;Process P0.1 external interrupt here
jmp INT_EXIT
;-------------------------------------------------------------------------------
; INT2 interrupt service routine
;-------------------------------------------------------------------------------
INTP02:
b0bclr FP02IRQ
;Process P0.2 external interrupt here
jmp INT_EXIT
;-------------------------------------------------------------------------------
; T0 interrupt service routine
;-------------------------------------------------------------------------------
INTT0:
b0bclr FT0IRQ
;Process T0 internal interrupt here
jmp INT_EXIT
;-------------------------------------------------------------------------------
; TC0 interrupt service routine
;-------------------------------------------------------------------------------
INTTC0:
b0bclr FTC0IRQ
;Process TC0 timer interrupt here
jmp INT_EXIT
;-------------------------------------------------------------------------------
; TC1 interrupt service routine
;-------------------------------------------------------------------------------
INTTC1:
b0bclr FTC1IRQ
;Process TC1 timer interrupt here
jmp INT_EXIT
;-------------------------------------------------------------------------------
; SIO interrupt service routine
;-------------------------------------------------------------------------------
INTSIO:
b0bclr FSIOIRQ
;Process SIO interrupt here
jmp INT_EXIT
;-------------------------------------------------------------------------------
; SysInit
; Initialize I/O, Timer, Interrupt, etc.
;-------------------------------------------------------------------------------
SysInit:
ret
;-------------------------------------------------------------------------------
; ClrRAM
; Use index @YZ to clear RAM (00h~7Fh)
;-------------------------------------------------------------------------------
ClrRAM:
; RAM Bank 0
clr Y ;Select bank 0
b0mov Z,#0x7f ;Set @YZ address from 7fh
ClrRAM10:
clr @YZ ;Clear @YZ content
decms Z ;z = z - 1 , skip next if z=0
jmp ClrRAM10
clr @YZ ;Clear address 0x00
; RAM Bank 1
mov A,#1
b0mov Y,A ;Select bank 1
b0mov Z,#0x7f ;Set @YZ address from 17fh
ClrRAM20:
clr @YZ ;Clear @YZ content
decms Z ;z = z - 1 , skip next if z=0
jmp ClrRAM20
clr @YZ ;Clear address 0x100
ret
;-------------------------------------------------------------------------------
ENDP
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