dataflash.c

测试SPI接口

//*----------------------------------------------------------------------------
//* File Name           : dataflashFlash.c
//* Object              : Flash routine
//* Creation            : ZZF  2005-11-3
//*----------------------------------------------------------------------------
// Include Standard files
#include <stdio.h>
#include "dataflash.h"
#include "project.h"

/////////////////////////////////////////////////////////////////////////////////////////////////////
//*------------------ Global Variables------------------------------------
static AT91S_DataflashFeatures		DeviceAT45DB021B;      //define a struct for AT45DB021B
static AT91S_DataflashDesc		DataflashDesc;         //define  a struct for DataflashDesc
static AT91S_DataFlash			DataFlash;             //define  a struct for DataFlash
static char	   Buffer_Dataflash[BUFFER_SIZE_DATAFLASH];   //define  a buffer for DataFlash

void DelayL(unsigned x){
	unsigned i;
	while(--x)	{
		for(i=0;i<1000;i++);
	}
}


/*
//////////////////////////////////////////////////////////////////////////////////////////////////////
// ----------------------------------------------------------------------------
//  \fn    AT91F_SPI_CfgSPI
//  \brief Config SPI IP
// ----------------------------------------------------------------------------
static void  AT91F_SPI0_CfgSPI(void)
{
    //  Reset the SPI0
	AT91F_SPI_Reset(AT91C_BASE_SPI0);

    //  Configure SPI0 in Master Mode--Fixed peripher----Mode detection disenable---NPCS0
	AT91F_SPI_CfgMode(AT91C_BASE_SPI0, AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | (0xE<<16));

    //  Configure SPI CS0 for DataFlash AT45DB021B 8 bite
	AT91F_SPI_CfgCs(AT91C_BASE_SPI0,0, AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & 0x100000) |((MCK/ (DATAFLASH_CLK)) << 8));

     //  Enable the SPI
       AT91F_SPI_Enable(AT91C_BASE_SPI0);
}*/
 //*----------------------------------------------------------------------------
//* \fn    AT91F_CfgDataFlash
//* \brief Config DataFlash Structures
//*----------------------------------------------------------------------------
static void AT91F_CfgDataFlash (void)
{
       // Init AT91S_DataflashFeatures Structure for AT45DB021B
	DeviceAT45DB021B.pages_number = 1024;
	DeviceAT45DB021B.pages_size   = 264;
	DeviceAT45DB021B.page_offset  = 10;
	DeviceAT45DB021B.byte_mask    = 0x300;
	
	// Init AT91S_DataflashDesc Structure
	DataflashDesc.state             = IDLE;
	DataflashDesc.DataFlash_state   = IDLE;

	// Init AT91S_DataFlash Global Structure, by default AT45DB021B choosen !!!
	DataFlash.pDataFlashDesc = &DataflashDesc;
	DataFlash.pDevice 	 = &DeviceAT45DB021B;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_DataFlashHandler
//* \brief SPI Fixed Peripheral C interrupt handler.
//*----------------------------------------------------------------------------
static void AT91F_DataFlashHandler(
	AT91PS_DataflashDesc pDesc,
	unsigned int status)
{
   //* If End of Receive Transfer interrupt occurred
    if (( status & AT91C_SPI_RXBUFF))
    {
	    if( pDesc->state == BUSY)
             {
       		//* Next State
			pDesc->state = IDLE;
		
			if (pDesc->DataFlash_state == GET_STATUS)
				pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1);

        	//* Disable the Transmit Interrupt
        	AT91C_BASE_SPI0->SPI_IDR = AT91C_SPI_RXBUFF;
               //* Enable sent and receive --PDC Transfer Control Register
        	AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
        	return;
    	   }	
    }          		
	pDesc->state = ERROR;
	AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;

	AT91C_BASE_SPI0->SPI_IDR = status;
}

 //*----------------------------------------------------------------------------
//* \fn    AT91F_SPI_Handler
//* \brief SPI Handler
//*----------------------------------------------------------------------------
void AT91F_SPI_Handler(void)
{
   unsigned int status;
   //get SPI_SR and SPI_IMR ----Status AND Interrupt Mask Status
   //status=(AT91F_SPI_GetStatus (AT91C_BASE_SPI0)&AT91F_SPI_GetInterruptMaskStatus(AT91C_BASE_SPI0));
    status = ( AT91C_BASE_SPI->SPI_SR & AT91C_BASE_SPI->SPI_IMR );
   AT91F_DataFlashHandler(DataFlash.pDataFlashDesc, status);
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_CfgSPIForDataFlash
//* \brief This function initialize SPI for Two ranges of DataFlash:
//* \brief SeriAl DataFlash AT45DB on CS0 AND DataFlash Card AT45DCB on CS10
//*----------------------------------------------------------------------------
void AT91F_CfgSPIForDataFlash(void )
{
   AT91F_CfgDataFlash();
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_SpiWrite
//* \brief set the PDC registers for a transfert
//*----------------------------------------------------------------------------
static void AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc )
{ 	
   	pDesc->state = BUSY;
   	
   	AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
   	
   	//* Initialize the Transmit and Receive Pointer
        AT91C_BASE_SPI0->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ;
        AT91C_BASE_SPI0->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ;

        //* Intialize the Transmit and Receive Counters
        AT91C_BASE_SPI0->SPI_RCR = pDesc->rx_cmd_size ;
        AT91C_BASE_SPI0->SPI_TCR = pDesc->tx_cmd_size ;

	if ( pDesc->tx_data_size != 0 )
   	{
	 //* Initialize the Next Transmit and Next Receive Pointer
    	AT91C_BASE_SPI0->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ;
        AT91C_BASE_SPI0->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ;

	//* Intialize the Next Transmit and Next Receive Counters
	 AT91C_BASE_SPI0->SPI_RNCR = pDesc->rx_data_size ;
	 AT91C_BASE_SPI0->SPI_TNCR = pDesc->tx_data_size ;
   	}
      	
   	//* Enable RXBUFF Interrupt
        AT91C_BASE_SPI0->SPI_IER = AT91C_SPI_RXBUFF;
        //* Enable sent and receive
   	AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN;

       // DelayL(8500); //do not delete it
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_DataFlashGetStatus
//* \brief Read the status register of the dataflash
//*----------------------------------------------------------------------------
static AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc)
{
   //* if a transfert is in progress ==> return 0	
    if( (pDesc->state) != IDLE)
    return DATAFLASH_BUSY;
		
    //* first send the read status command (D7H)
    pDesc->command[0] = DB_STATUS;
    pDesc->command[1] = 0;
	
    pDesc->DataFlash_state  = GET_STATUS;
    pDesc->tx_data_size 	= 0 ;	//* Transmit the command and receive response
    pDesc->tx_cmd_pt 		= pDesc->command ;
    pDesc->rx_cmd_pt 		= pDesc->command ;
    pDesc->rx_cmd_size 		= 2 ;
    pDesc->tx_cmd_size 		= 2 ;
    AT91F_SpiWrite (pDesc);
	
    return DATAFLASH_OK;
}


//*----------------------------------------------------------------------------
//* \fn    AT91F_DataFlashSendCommand
//* \brief Generic function to send a command to the dataflash
//*----------------------------------------------------------------------------
static AT91S_DataFlashStatus AT91F_DataFlashSendCommand (
	AT91PS_DataFlash pDataFlash,
	unsigned char OpCode,
	unsigned int CmdSize,
	unsigned int DataflashAddress)
{
    unsigned int adr;

    if ( (pDataFlash->pDataFlashDesc->state) != IDLE)
    return DATAFLASH_BUSY;
				
	//* process the address to obtain page address and byte address
    adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) << pDataFlash->pDevice->page_offset) + (DataflashAddress % (pDataFlash->pDevice->pages_size));