play.tan.qmsg

通过VERILOG HDL语言使用CPLD连接PS2键盘.

{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "sys_CLK " "Info: Assuming node \"sys_CLK\" is an undefined clock" {  } { { "play.v" "" { Text "C:/altera/quartus50/speak/play.v" 3 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sys_CLK" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "sys_CLK register counter4Hz\[0\] register counter4Hz\[9\] 70.92 MHz 14.1 ns Internal " "Info: Clock \"sys_CLK\" has Internal fmax of 70.92 MHz between source register \"counter4Hz\[0\]\" and destination register \"counter4Hz\[9\]\" (period= 14.1 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "9.600 ns + Longest register register " "Info: + Longest register to register delay is 9.600 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns counter4Hz\[0\] 1 REG LC99 39 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC99; Fanout = 39; REG Node = 'counter4Hz\[0\]'" {  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "" { counter4Hz[0] } "NODE_NAME" } "" } } { "play.v" "" { Text "C:/altera/quartus50/speak/play.v" 4 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.700 ns) + CELL(3.800 ns) 6.500 ns reduce_nor~1sexp 2 COMB SEXP97 11 " "Info: 2: + IC(2.700 ns) + CELL(3.800 ns) = 6.500 ns; Loc. = SEXP97; Fanout = 11; COMB Node = 'reduce_nor~1sexp'" {  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "6.500 ns" { counter4Hz[0] reduce_nor~1sexp } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.100 ns) 9.600 ns counter4Hz\[9\] 3 REG LC102 30 " "Info: 3: + IC(0.000 ns) + CELL(3.100 ns) = 9.600 ns; Loc. = LC102; Fanout = 30; REG Node = 'counter4Hz\[9\]'" {  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "3.100 ns" { reduce_nor~1sexp counter4Hz[9] } "NODE_NAME" } "" } } { "play.v" "" { Text "C:/altera/quartus50/speak/play.v" 4 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.900 ns 71.88 % " "Info: Total cell delay = 6.900 ns ( 71.88 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.700 ns 28.13 % " "Info: Total interconnect delay = 2.700 ns ( 28.13 % )" {  } {  } 0}  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "9.600 ns" { counter4Hz[0] reduce_nor~1sexp counter4Hz[9] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.600 ns" { counter4Hz[0] reduce_nor~1sexp counter4Hz[9] } { 0.000ns 2.700ns 0.000ns } { 0.000ns 3.800ns 3.100ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "sys_CLK destination 3.400 ns + Shortest register " "Info: + Shortest clock path from clock \"sys_CLK\" to destination register is 3.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.500 ns) 2.500 ns sys_CLK 1 CLK PIN_87 25 " "Info: 1: + IC(0.000 ns) + CELL(2.500 ns) = 2.500 ns; Loc. = PIN_87; Fanout = 25; CLK Node = 'sys_CLK'" {  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "" { sys_CLK } "NODE_NAME" } "" } } { "play.v" "" { Text "C:/altera/quartus50/speak/play.v" 3 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.900 ns) 3.400 ns counter4Hz\[9\] 2 REG LC102 30 " "Info: 2: + IC(0.000 ns) + CELL(0.900 ns) = 3.400 ns; Loc. = LC102; Fanout = 30; REG Node = 'counter4Hz\[9\]'" {  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "0.900 ns" { sys_CLK counter4Hz[9] } "NODE_NAME" } "" } } { "play.v" "" { Text "C:/altera/quartus50/speak/play.v" 4 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.400 ns 100.00 % " "Info: Total cell delay = 3.400 ns ( 100.00 % )" {  } {  } 0}  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "3.400 ns" { sys_CLK counter4Hz[9] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.400 ns" { sys_CLK sys_CLK~out counter4Hz[9] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 2.500ns 0.900ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "sys_CLK source 3.400 ns - Longest register " "Info: - Longest clock path from clock \"sys_CLK\" to source register is 3.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.500 ns) 2.500 ns sys_CLK 1 CLK PIN_87 25 " "Info: 1: + IC(0.000 ns) + CELL(2.500 ns) = 2.500 ns; Loc. = PIN_87; Fanout = 25; CLK Node = 'sys_CLK'" {  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "" { sys_CLK } "NODE_NAME" } "" } } { "play.v" "" { Text "C:/altera/quartus50/speak/play.v" 3 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.900 ns) 3.400 ns counter4Hz\[0\] 2 REG LC99 39 " "Info: 2: + IC(0.000 ns) + CELL(0.900 ns) = 3.400 ns; Loc. = LC99; Fanout = 39; REG Node = 'counter4Hz\[0\]'" {  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "0.900 ns" { sys_CLK counter4Hz[0] } "NODE_NAME" } "" } } { "play.v" "" { Text "C:/altera/quartus50/speak/play.v" 4 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.400 ns 100.00 % " "Info: Total cell delay = 3.400 ns ( 100.00 % )" {  } {  } 0}  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "3.400 ns" { sys_CLK counter4Hz[0] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.400 ns" { sys_CLK sys_CLK~out counter4Hz[0] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 2.500ns 0.900ns } } }  } 0}  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "3.400 ns" { sys_CLK counter4Hz[9] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.400 ns" { sys_CLK sys_CLK~out counter4Hz[9] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 2.500ns 0.900ns } } } { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "3.400 ns" { sys_CLK counter4Hz[0] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.400 ns" { sys_CLK sys_CLK~out counter4Hz[0] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 2.500ns 0.900ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.600 ns + " "Info: + Micro clock to output delay of source is 1.600 ns" {  } { { "play.v" "" { Text "C:/altera/quartus50/speak/play.v" 4 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "2.900 ns + " "Info: + Micro setup delay of destination is 2.900 ns" {  } { { "play.v" "" { Text "C:/altera/quartus50/speak/play.v" 4 -1 0 } }  } 0}  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "9.600 ns" { counter4Hz[0] reduce_nor~1sexp counter4Hz[9] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.600 ns" { counter4Hz[0] reduce_nor~1sexp counter4Hz[9] } { 0.000ns 2.700ns 0.000ns } { 0.000ns 3.800ns 3.100ns } } } { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "3.400 ns" { sys_CLK counter4Hz[9] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.400 ns" { sys_CLK sys_CLK~out counter4Hz[9] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 2.500ns 0.900ns } } } { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "3.400 ns" { sys_CLK counter4Hz[0] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.400 ns" { sys_CLK sys_CLK~out counter4Hz[0] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 2.500ns 0.900ns } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "sys_CLK audio audiof 6.600 ns register " "Info: tco from clock \"sys_CLK\" to destination pin \"audio\" through register \"audiof\" is 6.600 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "sys_CLK source 3.400 ns + Longest register " "Info: + Longest clock path from clock \"sys_CLK\" to source register is 3.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.500 ns) 2.500 ns sys_CLK 1 CLK PIN_87 25 " "Info: 1: + IC(0.000 ns) + CELL(2.500 ns) = 2.500 ns; Loc. = PIN_87; Fanout = 25; CLK Node = 'sys_CLK'" {  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "" { sys_CLK } "NODE_NAME" } "" } } { "play.v" "" { Text "C:/altera/quartus50/speak/play.v" 3 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.900 ns) 3.400 ns audiof 2 REG LC105 2 " "Info: 2: + IC(0.000 ns) + CELL(0.900 ns) = 3.400 ns; Loc. = LC105; Fanout = 2; REG Node = 'audiof'" {  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "0.900 ns" { sys_CLK audiof } "NODE_NAME" } "" } } { "play.v" "" { Text "C:/altera/quartus50/speak/play.v" 5 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.400 ns 100.00 % " "Info: Total cell delay = 3.400 ns ( 100.00 % )" {  } {  } 0}  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "3.400 ns" { sys_CLK audiof } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.400 ns" { sys_CLK sys_CLK~out audiof } { 0.000ns 0.000ns 0.000ns } { 0.000ns 2.500ns 0.900ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.600 ns + " "Info: + Micro clock to output delay of source is 1.600 ns" {  } { { "play.v" "" { Text "C:/altera/quartus50/speak/play.v" 5 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.600 ns + Longest register pin " "Info: + Longest register to pin delay is 1.600 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns audiof 1 REG LC105 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC105; Fanout = 2; REG Node = 'audiof'" {  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "" { audiof } "NODE_NAME" } "" } } { "play.v" "" { Text "C:/altera/quartus50/speak/play.v" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.600 ns) 1.600 ns audio 2 PIN PIN_69 0 " "Info: 2: + IC(0.000 ns) + CELL(1.600 ns) = 1.600 ns; Loc. = PIN_69; Fanout = 0; PIN Node = 'audio'" {  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "1.600 ns" { audiof audio } "NODE_NAME" } "" } } { "play.v" "" { Text "C:/altera/quartus50/speak/play.v" 2 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.600 ns 100.00 % " "Info: Total cell delay = 1.600 ns ( 100.00 % )" {  } {  } 0}  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "1.600 ns" { audiof audio } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.600 ns" { audiof audio } { 0.000ns 0.000ns } { 0.000ns 1.600ns } } }  } 0}  } { { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "3.400 ns" { sys_CLK audiof } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.400 ns" { sys_CLK sys_CLK~out audiof } { 0.000ns 0.000ns 0.000ns } { 0.000ns 2.500ns 0.900ns } } } { "C:/altera/quartus50/speak/db/play_cmp.qrpt" "" { Report "C:/altera/quartus50/speak/db/play_cmp.qrpt" Compiler "play" "UNKNOWN" "V1" "C:/altera/quartus50/speak/db/play.quartus_db" { Floorplan "C:/altera/quartus50/speak/" "" "1.600 ns" { audiof audio } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.600 ns" { audiof audio } { 0.000ns 0.000ns } { 0.000ns 1.600ns } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1  Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Fri Jul 06 00:18:48 2007 " "Info: Processing ended: Fri Jul 06 00:18:48 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0}  } {  } 0}