hongwai.hier_info

通过VERILOG HDL语言使用CPLD连接PS2键盘.

|hongwai
led[0] <= ledd[0].DB_MAX_OUTPUT_PORT_TYPE
led[1] <= <VCC>
led[2] <= ledd[2].DB_MAX_OUTPUT_PORT_TYPE
led[3] <= <VCC>
led[4] <= ledd[4].DB_MAX_OUTPUT_PORT_TYPE
led[5] <= <VCC>
led[6] <= ledd[6].DB_MAX_OUTPUT_PORT_TYPE
led[7] <= <VCC>
jie => always0~0.IN0