jianpan1.fit.eqn

通过VERILOG HDL语言使用CPLD连接PS2键盘.

--A1L64 is ledd.0110~17 at LC27
A1L64_p1_out = A1L31 & A1L11;
A1L64_p2_out = !A1L11 & A1L64;
A1L64_p3_out = A1L31 & A1L64;
A1L64_or_out = A1L64_p1_out # A1L64_p2_out # A1L64_p3_out;
A1L64 = A1L64_or_out;


--A1L15 is ledd.1100~31 at LC4
A1L15_p1_out = A1L11 & !A1L12 & A1L32 & A1L62 & A1L92 & A1L51;
A1L15_p2_out = !A1L11 & A1L15;
A1L15_p3_out = A1L15 & !A1L12 & A1L32 & A1L62 & A1L92 & A1L51;
A1L15_or_out = A1L15_p1_out # A1L15_p2_out # A1L15_p3_out;
A1L15 = A1L15_or_out;


--A1L35 is ledd.1110~24 at LC106
A1L35_p1_out = A1L11 & !A1L12 & A1L32 & A1L62 & A1L92 & !a[2] & a[3] & a[0] & a[1];
A1L35_p2_out = !A1L11 & A1L35;
A1L35_p3_out = A1L35 & !A1L12 & A1L32 & A1L62 & A1L92 & !a[2] & a[3] & a[0] & a[1];
A1L35_or_out = A1L35_p1_out # A1L35_p2_out # A1L35_p3_out;
A1L35 = A1L35_or_out;


--A1L45 is ledd.1111~31 at LC5
A1L45_p1_out = A1L11 & !A1L12 & A1L32 & A1L62 & A1L92 & a[2] & !a[3] & a[0] & a[1];
A1L45_p2_out = !A1L11 & A1L45;
A1L45_p3_out = A1L45 & !A1L12 & A1L32 & A1L62 & A1L92 & a[2] & !a[3] & a[0] & a[1];
A1L45_or_out = A1L45_p1_out # A1L45_p2_out # A1L45_p3_out;
A1L45 = A1L45_or_out;


--A1L24 is ledd.0010~24 at LC7
A1L24_p1_out = A1L11 & A1L62 & !A1L92 & A1L12 & A1L32 & !a[2] & a[3] & a[0] & a[1];
A1L24_p2_out = !A1L11 & A1L24;
A1L24_p3_out = A1L24 & A1L62 & !A1L92 & A1L12 & A1L32 & !a[2] & a[3] & a[0] & a[1];
A1L24_or_out = A1L24_p1_out # A1L24_p2_out # A1L24_p3_out;
A1L24 = A1L24_or_out;


--A1L94 is ledd.1010~17 at LC6
A1L94_p1_out = A1L11 & A1L12 & !A1L32 & A1L62 & A1L92 & !a[2] & a[3] & a[0] & a[1];
A1L94_p2_out = !A1L11 & A1L94;
A1L94_p3_out = A1L94 & A1L12 & !A1L32 & A1L62 & A1L92 & !a[2] & a[3] & a[0] & a[1];
A1L94_or_out = A1L94_p1_out # A1L94_p2_out # A1L94_p3_out;
A1L94 = A1L94_or_out;


--A1L74 is ledd.0111~38 at LC15
A1L74_p1_out = A1L41 & A1L11;
A1L74_p2_out = !A1L11 & A1L74;
A1L74_p3_out = A1L41 & A1L74;
A1L74_or_out = A1L74_p1_out # A1L74_p2_out # A1L74_p3_out;
A1L74 = A1L74_or_out;


--A1L34 is ledd.0011~24 at LC12
A1L34_p1_out = A1L11 & A1L62 & !A1L92 & A1L12 & A1L32 & a[2] & !a[3] & a[0] & a[1];
A1L34_p2_out = !A1L11 & A1L34;
A1L34_p3_out = A1L34 & A1L62 & !A1L92 & A1L12 & A1L32 & a[2] & !a[3] & a[0] & a[1];
A1L34_or_out = A1L34_p1_out # A1L34_p2_out # A1L34_p3_out;
A1L34 = A1L34_or_out;


--A1L84 is ledd.1001~17 at LC10
A1L84_p1_out = A1L11 & A1L12 & !A1L32 & A1L62 & A1L92 & a[0] & !a[1] & a[2] & a[3];
A1L84_p2_out = !A1L11 & A1L84;
A1L84_p3_out = A1L84 & A1L12 & !A1L32 & A1L62 & A1L92 & a[0] & !a[1] & a[2] & a[3];
A1L84_or_out = A1L84_p1_out # A1L84_p2_out # A1L84_p3_out;
A1L84 = A1L84_or_out;


--A1L04 is ledd.0000~17 at LC8
A1L04_p1_out = A1L11 & A1L62 & !A1L92 & A1L12 & A1L32 & A1L51;
A1L04_p2_out = !A1L11 & A1L04;
A1L04_p3_out = A1L04 & A1L62 & !A1L92 & A1L12 & A1L32 & A1L51;
A1L04_or_out = A1L04_p1_out # A1L04_p2_out # A1L04_p3_out;
A1L04 = A1L04_or_out;


--A1L65 is reduce_or~106 at LC125
A1L65_p1_out = !A1L44 & !A1L14 & !A1L25 & !A1L05;
A1L65_or_out = A1L65_p1_out;
A1L65 = !(A1L65_or_out);


--A1L75 is reduce_or~109 at LC11
A1L75_p1_out = !A1L15 & !A1L14 & !A1L74 & !A1L04;
A1L75_or_out = A1L75_p1_out;
A1L75 = !(A1L75_or_out);


--A1L85 is reduce_or~112 at LC13
A1L85_p1_out = !A1L25 & !A1L24 & !A1L14 & !A1L74 & !A1L34;
A1L85_or_out = A1L85_p1_out;
A1L85 = !(A1L85_or_out);


--A1L95 is reduce_or~115 at LC128
A1L95_p1_out = !A1L15 & !A1L35 & !A1L45 & !A1L24;
A1L95_or_out = A1L95_p1_out;
A1L95 = !(A1L95_or_out);


--A1L06 is reduce_or~118 at LC126
A1L06_p1_out = !A1L05 & !A1L54 & !A1L64 & !A1L15 & !A1L35 & !A1L45;
A1L06_or_out = A1L06_p1_out;
A1L06 = !(A1L06_or_out);


--A1L16 is reduce_or~121 at LC14
A1L16_p1_out = !A1L54 & !A1L44 & !A1L14 & !A1L74 & !A1L34 & !A1L84;
A1L16_or_out = A1L16_p1_out;
A1L16 = !(A1L16_or_out);


--A1L26 is reduce_or~124 at LC16
A1L26_p1_out = !A1L45 & !A1L94 & !A1L44 & !A1L14 & !A1L74;
A1L26_or_out = A1L26_p1_out;
A1L26 = !(A1L26_or_out);


--~VCC~0 is ~VCC~0 at LC9
~VCC~0_or_out = GND;
~VCC~0 = !(~VCC~0_or_out);


--~VCC~1 is ~VCC~1 at LC113
~VCC~1_or_out = GND;
~VCC~1 = !(~VCC~1_or_out);


--~GND~0 is ~GND~0 at LC115
~GND~0_or_out = GND;
~GND~0 = ~GND~0_or_out;


--~GND~1 is ~GND~1 at LC117
~GND~1_or_out = GND;
~GND~1 = ~GND~1_or_out;


--~GND~2 is ~GND~2 at LC120
~GND~2_or_out = GND;
~GND~2 = ~GND~2_or_out;


--~GND~3 is ~GND~3 at LC121
~GND~3_or_out = GND;
~GND~3 = ~GND~3_or_out;


--~GND~4 is ~GND~4 at LC123
~GND~4_or_out = GND;
~GND~4 = ~GND~4_or_out;


--A1L22 is bb[0]~136 at LC92
A1L22_p1_out = B1_dffs[24] & A1L12;
A1L22_p2_out = A1L12 & B1_dffs[22];
A1L22 = A1L22_p1_out # A1L22_p2_out;


--A1L42 is bb[1]~141 at LC100
A1L42_p1_out = B1_dffs[24] & A1L32;
A1L42_p2_out = A1L32 & B1_dffs[22];
A1L42 = A1L42_p1_out # A1L42_p2_out;


--A1L72 is bb[2]~148 at LC102
A1L72_p1_out = !B1_dffs[24] & A1L62;
A1L72_p2_out = A1L62 & B1_dffs[22];
A1L72 = A1L72_p1_out # A1L72_p2_out;


--clk is clk at PIN_87
--operation mode is input

clk = INPUT();


--a[0] is a[0] at PIN_58
--operation mode is input

a[0] = INPUT();


--a[1] is a[1] at PIN_57
--operation mode is input

a[1] = INPUT();


--a[2] is a[2] at PIN_56
--operation mode is input

a[2] = INPUT();


--a[3] is a[3] at PIN_55
--operation mode is input

a[3] = INPUT();


--lddat[7] is lddat[7] at PIN_97
--operation mode is output

lddat[7] = OUTPUT(~VCC~0);


--wei[0] is wei[0] at PIN_75
--operation mode is output

wei[0] = OUTPUT(~VCC~1);


--wei[1] is wei[1] at PIN_76
--operation mode is output

wei[1] = OUTPUT(~GND~0);


--wei[2] is wei[2] at PIN_77
--operation mode is output

wei[2] = OUTPUT(~GND~1);


--wei[3] is wei[3] at PIN_79
--operation mode is output

wei[3] = OUTPUT(~GND~2);


--wei[4] is wei[4] at PIN_80
--operation mode is output

wei[4] = OUTPUT(~GND~3);


--wei[5] is wei[5] at PIN_81
--operation mode is output

wei[5] = OUTPUT(~GND~4);


--b[2] is b[2] at PIN_63
--operation mode is output

b[2] = OUTPUT(A1L82);


--b[3] is b[3] at PIN_64
--operation mode is output

b[3] = OUTPUT(A1L92);


--b[0] is b[0] at PIN_60
--operation mode is output

b[0] = OUTPUT(A1L12);


--b[1] is b[1] at PIN_61
--operation mode is output

b[1] = OUTPUT(A1L52);


--lddat[0] is lddat[0] at PIN_83
--operation mode is output

lddat[0] = OUTPUT(A1L65);


--lddat[1] is lddat[1] at PIN_84
--operation mode is output

lddat[1] = OUTPUT(A1L06);


--lddat[2] is lddat[2] at PIN_85
--operation mode is output

lddat[2] = OUTPUT(A1L95);


--lddat[5] is lddat[5] at PIN_94
--operation mode is output

lddat[5] = OUTPUT(A1L85);


--lddat[6] is lddat[6] at PIN_96
--operation mode is output

lddat[6] = OUTPUT(A1L75);


--lddat[3] is lddat[3] at PIN_92
--operation mode is output

lddat[3] = OUTPUT(A1L26);


--lddat[4] is lddat[4] at PIN_93
--operation mode is output

lddat[4] = OUTPUT(A1L16);






--A1L82 is bb[2]~149 at LC97
A1L82_or_out = A1L62;
A1L82 = A1L82_or_out;


--A1L52 is bb[1]~150 at LC94
A1L52_or_out = A1L32;
A1L52 = A1L52_or_out;