dianzhen1.map.qmsg

通过VERILOG HDL语言使用CPLD连接PS2键盘.

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 168 06/22/2005 Service Pack 1 SJ Full Version " "Info: Version 5.0 Build 168 06/22/2005 Service Pack 1 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Jul 05 23:12:01 2007 " "Info: Processing started: Thu Jul 05 23:12:01 2007" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off dianzhen1 -c dianzhen1 " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off dianzhen1 -c dianzhen1" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "dianzhen1.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file dianzhen1.v" { { "Info" "ISGN_ENTITY_NAME" "1 dianzhen1 " "Info: Found entity 1: dianzhen1" {  } { { "dianzhen1.v" "" { Text "C:/altera/quartus50/88led_array/dianzhen1.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "dianzhen1 " "Info: Elaborating entity \"dianzhen1\" for the top level hierarchy" {  } {  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "1 " "Info: Inferred 1 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "count\[0\]~0 33 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=33) from the following logic: \"count\[0\]~0\"" {  } { { "dianzhen1.v" "count\[0\]~0" { Text "C:/altera/quartus50/88led_array/dianzhen1.v" 8 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 227 1 0 } }  } 0}  } {  } 0}
{ "Info" "IMTM_MTM_PROMOTE_GLOBAL" "" "Info: Promoted pin-driven signal(s) to global signal" { { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLOCK" "clock " "Info: Promoted clock signal driven by pin \"clock\" to global clock signal" {  } {  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "61 " "Info: Implemented 61 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "1 " "Info: Implemented 1 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "16 " "Info: Implemented 16 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_MCELLS" "44 " "Info: Implemented 44 macrocells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Jul 05 23:12:05 2007 " "Info: Processing ended: Thu Jul 05 23:12:05 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Info: Elapsed time: 00:00:05" {  } {  } 0}  } {  } 0}