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📄 sysalib.s

📁 MPC8560 for vxwork BSP
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** sysOutByte - writes a byte to an io address.** This function writes a byte to a specified io address.** RETURNS: N/A* VOID sysOutByte*     (*     UCHAR *  pAddr,		/@ Virtual I/O addr to write to @/*     UCHAR    data		/@ data to be written @/*     )*/FUNC_BEGIN(sysOutByte)	stbx	p1,r0,p0	/* Write a byte to PCI space */	eieio			/* Sync I/O operation */	sync	bclr	20,0		/* Return to caller */FUNC_END(sysOutByte)	/******************************************************************************* sysInWord - reads a word from an address, swapping the bytes.** This function reads a swapped word from a specified * address.** RETURNS:* Returns swapped 16 bit data from the specified address.* USHORT sysInWord*     (*     ULONG  address,		/@ addr to read from @/*     )*/FUNC_BEGIN(sysInWord)	eieio			/* Sync I/O operation */	sync        lhbrx   p0,r0,p0	/* Read and swap */        bclr    20,0		/* Return to caller */FUNC_END(sysInWord)/******************************************************************************* sysOutWord - writes a word to an address swapping the bytes.** This function writes a swapped word to a specified * address.** RETURNS: N/A* VOID sysOutWord*     (*     ULONG address,		/@ Virtual addr to write to @/*     UINT16  data		/@ Data to be written       @/*     )*/FUNC_BEGIN(sysOutWord)        sthbrx  p1,r0,p0	/* Write with swap to address */	eieio			/* Sync I/O operation */	sync        bclr    20,0		/* Return to caller */FUNC_END(sysOutWord)/******************************************************************************* sysInLong - reads a long from an address.** This function reads a long from a specified PCI Config Space (little-endian)* address.** RETURNS:* Returns 32 bit data from the specified register.  Note that for PCI systems* if no target responds, the data returned to the CPU will be 0xffffffff.* ULONG sysInLong*     (*     ULONG  address,		/@ Virtual addr to read from @/*     )*/FUNC_BEGIN(sysInLong)	eieio			/* Sync I/O operation */	sync        lwbrx   p0,r0,p0	/* Read and swap from address */        bclr    20,0		/* Return to caller */FUNC_END(sysInLong)/******************************************************************************** sysOutLong - write a swapped long to address.** This routine will store a 32-bit data item (input as big-endian)* into an address in little-endian mode.** RETURNS: N/A* VOID sysOutLong*     (*     ULONG   address,		/@ Virtual addr to write to @/*     ULONG   data		/@ Data to be written @/*     )*/FUNC_BEGIN(sysOutLong)        stwbrx  p1,r0,p0	/* store data as little-endian */	eieio			/* Sync I/O operation */	sync        bclr    20,0FUNC_END(sysOutLong)/******************************************************************************** sysPciRead32 - read 32 bit PCI data** This routine will read a 32-bit data item from PCI (I/O or* memory) space.** RETURNS: N/A* VOID sysPciRead32*     (*     ULONG *  pAddr,		/@ Virtual addr to read from @/*     ULONG *  pResult		/@ location to receive data @/*     )*/FUNC_BEGIN(sysPciRead32)	eieio			/* Sync I/O operation */        lwbrx   p0,r0,p0	/* get the data and swap the bytes */        stw     p0,0(p1)	/* store into address ptd. to by p1 */        bclr    20,0FUNC_END(sysPciRead32)/******************************************************************************** sysPciWrite32 - write a 32 bit data item to PCI space** This routine will store a 32-bit data item (input as big-endian)* into PCI (I/O or memory) space in little-endian mode.** RETURNS: N/A* VOID sysPciWrite32*     (*     ULONG *  pAddr,		/@ Virtual addr to write to @/*     ULONG   data		/@ Data to be written @/*     )*/FUNC_BEGIN(sysPciWrite32)        stwbrx  p1,r0,p0	/* store data as little-endian */        bclr    20,0FUNC_END(sysPciWrite32)/******************************************************************************* sysPciInByte - reads a byte from PCI Config Space.** This function reads a byte from a specified PCI Config Space address.** RETURNS:* Returns 8 bit data from the specified register.  Note that for PCI systems* if no target responds, the data returned to the CPU will be 0xff.* UINT8 sysPciInByte*     (*     UINT8 *  pAddr,		/@ Virtual addr to read from @/*     )*/FUNC_BEGIN(sysPciInByte)	eieio			/* Sync I/O operation */        lbzx    p0,r0,p0	/* Read byte from PCI space */        bclr    20,0		/* Return to caller */FUNC_END(sysPciInByte)	/******************************************************************************* sysPciInWord - reads a word (16-bit big-endian) from PCI Config Space.** This function reads a word from a specified PCI Config Space (little-endian)* address.** RETURNS:* Returns 16 bit data from the specified register.  Note that for PCI systems* if no target responds, the data returned to the CPU will be 0xffff.* USHORT sysPciInWord*     (*     USHORT *  pAddr,		/@ Virtual addr to read from @/*     )*/FUNC_BEGIN(sysPciInWord)	eieio			/* Sync I/O operation */        lhbrx   p0,r0,p0	/* Read and swap from PCI space */        bclr    20,0		/* Return to caller */FUNC_END(sysPciInWord)	/******************************************************************************* sysPciInLong - reads a long (32-bit big-endian) from PCI Config Space.** This function reads a long from a specified PCI Config Space (little-endian)* address.** RETURNS:* Returns 32 bit data from the specified register.  Note that for PCI systems* if no target responds, the data returned to the CPU will be 0xffffffff.* ULONG sysPciInLong*     (*     ULONG *  pAddr,		/@ Virtual addr to read from @/*     )*/FUNC_BEGIN(sysPciInLong)	eieio			/* Sync I/O operation */        lwbrx   p0,r0,p0	/* Read and swap from PCI space */        bclr    20,0		/* Return to caller */FUNC_END(sysPciInLong)	/******************************************************************************** sysPciOutByte - writes a byte to PCI Config Space.** This function writes a byte to a specified PCI Config Space address.** RETURNS: N/A* VOID sysPciOutByte*     (*     UINT8 *  pAddr,		/@ Virtual addr to write to @/*     UINT8  data		/@ Data to be written       @/*     )*/FUNC_BEGIN(sysPciOutByte)        stbx    p1,r0,p0	/* Write a byte to PCI space */        bclr    20,0		/* Return to caller */FUNC_END(sysPciOutByte)	/******************************************************************************** sysPciOutWord - writes a word (16-bit big-endian) to PCI Config Space.** This function writes a word to a specified PCI Config Space (little-endian)* address.** RETURNS: N/A* VOID sysPciOutWord*     (*     USHORT *  pAddr,		/@ Virtual addr to write to @/*     USHORT  data		/@ Data to be written       @/*     )*/FUNC_BEGIN(sysPciOutWord)        sthbrx  p1,r0,p0	/* Write with swap to PCI space */        bclr    20,0		/* Return to caller */FUNC_END(sysPciOutWord)	/******************************************************************************** sysPciOutLong - writes a long (32-bit big-endian) to PCI Config Space.** This function writes a long to a specified PCI Config Space (little-endian)* address.** RETURNS: N/A* VOID sysPciOutLong*     (*     ULONG *  pAddr,		/@ Virtual addr to write to @/*     ULONG  data		/@ Data to be written       @/*     )*/FUNC_BEGIN(sysPciOutLong)        stwbrx  p1,r0,p0	/* Write big-endian long to little-endian */        mr      p0,p1		/* PCI space */        bclr    20,0		/* Return to caller */FUNC_END(sysPciOutLong)/******************************************************************************** sysPCGet - Get the value of the PC (Program Counter)** This routine returns the value of the PC.** SYNOPSIS* \ss* UINT32 sysPCGet*     (*     void*     )* \se** RETURNS: the Program Counter Register (PC) value.*/FUNC_BEGIN(sysPCGet)        mflr	r4 /* Save LR value */        bl      Next    /* Set PC */Next:        mflr    r3 /* Get PC */		mtlr    r4 /* Restor LR value */	blrFUNC_END(sysPCGet)/******************************************************************************** sysTimeBaseLGet - Get lower half of Time Base Register** SYNOPSIS* \ss* UINT32 sysTimeBaseLGet(void)* \se** This routine will read the contents the lower half of the Time* Base Register (TBL - TBR 268).** RETURNS: value of TBR 268 (in r3)*/FUNC_BEGIN(sysTimeBaseLGet)    mfspr       r3, 268    bclr        20,0                    /* Return to caller */FUNC_END(sysTimeBaseLGet)/******************************************************************************** sysL1Csr1Set - Set the value of L1CSR1** SYNOPSIS* \ss* void sysL1Csr1Set*     (*     UINT32*     )* \se** RETURNS: none*/FUNC_BEGIN(sysL1Csr1Set)        msync        isync        mtspr   L1CSR1, r3        msync        isync        blrFUNC_END(sysL1Csr1Set)#if defined(INCLUDE_L1_IPARITY_HDLR)# include "sysL1ICacheParity.s"#elif defined(INCLUDE_L1_IPARITY_HDLR_INBSP)#define DETECT_EXCHDL_ADRS(ivor)  \        mfspr   p0, IVPR;         \        mfspr   p1, ivor;         \        or      p1, p1, p0;       \        mfspr   p0, MCSRR0;       \        cmpw    p0, p1;           \        beq     faultDetected;/********************************************************************* * * sysIParityHandler - This routine is call for a machine check.  * This routine will invalidate the instruction cache for the address  * in MCSRRO. If only instruction parity error then it will return from * machine check else it will go to standard machine check handler. */ FUNC_BEGIN(sysIParityHandler)        /* Save registers used */             mtspr   SPRG4_W ,p0        mtspr   SPRG5_W ,p1        mfcr    p0        mtspr   SPRG6_W ,p0                    /* check for ICPERR */        mfspr   p1, MCSR        andis.  p1, p1, 0x4000        beq     ppcE500Mch_norm        /* check if mcsrr0 is pointing to 1st instr of exception handler */        DETECT_EXCHDL_ADRS(IVOR0)        DETECT_EXCHDL_ADRS(IVOR1)        DETECT_EXCHDL_ADRS(IVOR2)        DETECT_EXCHDL_ADRS(IVOR3)        DETECT_EXCHDL_ADRS(IVOR4)        DETECT_EXCHDL_ADRS(IVOR5)        DETECT_EXCHDL_ADRS(IVOR6)        DETECT_EXCHDL_ADRS(IVOR8)        DETECT_EXCHDL_ADRS(IVOR10)        DETECT_EXCHDL_ADRS(IVOR11)        DETECT_EXCHDL_ADRS(IVOR12)        DETECT_EXCHDL_ADRS(IVOR13)        DETECT_EXCHDL_ADRS(IVOR14)        DETECT_EXCHDL_ADRS(IVOR15)        DETECT_EXCHDL_ADRS(IVOR32)        DETECT_EXCHDL_ADRS(IVOR33)        DETECT_EXCHDL_ADRS(IVOR34)        DETECT_EXCHDL_ADRS(IVOR35)        /* p0 here has mcsrr0 value, round to cache line boundary */        rlwinm  p0, p0, 0, 0, 31 - CACHE_ALIGN_SHIFT         /* invalidate instruction cache */        icbi    r0, p0        isync#ifdef INCLUDE_SHOW_ROUTINES        /* increment instrParityCount for num of parity errors */         lis     p0, HIADJ(instrParityCount)        addi    p0, p0, LO(instrParityCount)        lwz     p1, 0(p0)        addi    p1, p1, 1        stw     p1, 0(p0)#endif        /* clear MCSR ICPERR bit */        mfspr   p1, MCSR        rlwinm  p1, p1, 0, 2, 0         /* clear ICPERR */        mtspr   MCSR, p1        /* return after invalidate */        mfspr   p0, SPRG6_R        mtcr    p0        mfspr   p0, SPRG4_R        mfspr   p1, SPRG5_R        isync             rfmci /*.long   0x4c00004c*/ppcE500Mch_norm:        mfspr   p0, SPRG6_R        mtcr    p0        mfspr   p0, SPRG4_R        mfspr   p1, SPRG5_R        ba      0x200       /* _EXC_OFF_MACH */faultDetected:        /* rebooting, no need to save regs */        bl      chipErrataCpu29Print        li      p0, BOOT_NORMAL        b       sysToMonitor    /* reset */FUNC_END(sysIParityHandler)/* Branch to above handler copied to _EXC_OFF_END */FUNC_BEGIN(jumpIParity)        ba     sysIParityHandlerFUNC_END(jumpIParity)/**************************************************************** * sysIvor1Set - fills in value of IVOR1 register to override  * standard machine check handler for L1 instruction parity recovery. */FUNC_BEGIN(sysIvor1Set)        mtspr IVOR1, p0        blrFUNC_END(sysIvor1Set)#endif  /* INCLUDE_L1_IPARITY_HDLR */

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