motfcc2end.h

MPC8560 for vxwork BSP

/* MotFcc2End.h - Second Generation Motorola FCC Ethernet network interface.*/

/*
 * Copyright (c) 2003-2005 Wind River Systems, Inc.
 *
 * The right to copy, distribute, modify or otherwise make use
 * of this software may be licensed only pursuant to the terms
 * of an applicable Wind River license agreement.
 */

/*
modification history
--------------------
01j,19mar05,dlk  Enhancements. Combine buffer descriptor status and length
                 fields.
01j,19aug04,mdo  Clean up unused variables.
01h,23jul04,mdo  Base 6 Enhancements
01g,15jun04,mdo  Fix compiler warning with gnu compiler.
01f,04jun04,mil  Changed cacheArchXXX funcs to cacheXXX funcs.
01e,30mar04,mdo  SPR's 81336, 93209, 94561, 94562 and general cleanup.
01d,12jan04,dat  lint removal
01c,05dec03,rcs  fixed warnings for base6
01b,13aug03,gjc  Fixed SPRs #89689,#89649,#87812,#87749,90135,#86434
01a,16jan03,gjc  SPR#85164 :Second Generation Motorola FCC END header.
*/

#ifndef __INCmotFcc2Endh
#define __INCmotFcc2Endh

/* includes */

#ifdef __cplusplus
extern "C" {
#endif

#include "etherLib.h"
#include "miiLib.h"

/* defines */
/*
 * redefine the macro below in the bsp if you need to access the device
 * registers/descriptors in a more suitable way.
 */
#ifndef MOT_FCC_LONG_WR
#define MOT_FCC_LONG_WR(addr, value)                \
    (* ((UINT32 *) addr) = ((UINT32) (value)))
#endif /* MOT_FCC_LONG_WR */

#ifndef MOT_FCC_WORD_WR
#define MOT_FCC_WORD_WR(addr, value)                \
    (* (addr) = ((UINT16) (value)))
#endif /* MOT_FCC_WORD_WR */

#ifndef MOT_FCC_BYTE_WR
#define MOT_FCC_BYTE_WR(addr, value)                \
    (* (addr) = ((UINT8) (value)))
#endif /* MOT_FCC_BYTE_WR */

#ifndef MOT_FCC_LONG_RD
#define MOT_FCC_LONG_RD(addr, value)                \
    ((value) = (* (UINT32 *) (addr)))
#endif /* MOT_FCC_LONG_RD */

#ifndef MOT_FCC_WORD_RD
#define MOT_FCC_WORD_RD(addr, value)                \
    ((value) = (* (UINT16 *) (addr)))
#endif /* MOT_FCC_WORD_RD */

#ifndef MOT_FCC_BYTE_RD
#define MOT_FCC_BYTE_RD(addr, value)                \
    ((value) = (* (UINT8 *) (addr)))
#endif /* MOT_FCC_BYTE_RD */

/*
 * Default macro definitions for BSP interface.
 * These macros can be redefined in a wrapper file, to generate
 * a new module with an optimized interface.
 */

#define MOT_FCC_INUM(pDrvCtrl)                      \
    ((int) INUM_FCC1 + ((pDrvCtrl)->fccNum - 1))

#define MOT_FCC_IVEC(pDrvCtrl)                      \
    INUM_TO_IVEC (MOT_FCC_INUM (pDrvCtrl))

#ifndef SYS_FCC_INT_CONNECT
#define SYS_FCC_INT_CONNECT(pDrvCtrl, pFunc, arg, ret)                  \
    do  {								\
	IMPORT STATUS intConnect (VOIDFUNCPTR *, VOIDFUNCPTR, int);     \
	pDrvCtrl->intrConnect = TRUE;					\
	ret = (intConnect) ((VOIDFUNCPTR*) MOT_FCC_IVEC (pDrvCtrl),     \
			    (pFunc), (int) (arg));			\
	} while (FALSE)
#endif /* SYS_FCC_INT_CONNECT */

#ifndef SYS_FCC_INT_DISCONNECT
#define SYS_FCC_INT_DISCONNECT(pDrvCtrl, pFunc, arg, ret)		\
    do  {								\
	ret = OK;							\
	if (MOT_FCC_IVEC (pDrvCtrl) && (pDrvCtrl->intDiscFunc != NULL))	\
	    {								\
	    pDrvCtrl->intrConnect = FALSE;				\
	    ret = (*pDrvCtrl->intDiscFunc)				\
			((VOIDFUNCPTR*) MOT_FCC_IVEC (pDrvCtrl),	\
			 (pFunc));					\
	    }								\
	} while (FALSE)
#endif /* SYS_FCC_INT_DISCONNECT */

#ifndef SYS_FCC_INT_ENABLE
#define SYS_FCC_INT_ENABLE(pDrvCtrl, ret)               \
{                                                       \
IMPORT int intEnable (int);                             \
ret = OK;                                               \
                                                        \
if (MOT_FCC_INUM (pDrvCtrl))                            \
    ret = intEnable ((int) (MOT_FCC_INUM (pDrvCtrl)));  \
}
#endif /* SYS_FCC_INT_ENABLE */

#ifndef SYS_FCC_INT_DISABLE
#define SYS_FCC_INT_DISABLE(pDrvCtrl, ret)              \
{                                                       \
IMPORT int intDisable (int);                            \
ret = OK;                                               \
                                                        \
if (MOT_FCC_INUM (pDrvCtrl))                            \
    ret = intDisable ((int) (MOT_FCC_INUM (pDrvCtrl))); \
}
#endif /* SYS_FCC_INT_DISABLE */

#ifndef SYS_FCC_INT_ACK
#define SYS_FCC_INT_ACK(pDrvCtrl, ret)                  \
{                                                       \
ret = OK;                                               \
}
#endif /* SYS_FCC_INT_ACK */

#define SYS_FCC_ENET_ADDR_GET(address)                              \
if (sysFccEnetAddrGet != NULL)                                      \
    if (sysFccEnetAddrGet (pDrvCtrl->unit, (address)) == ERROR)     \
    {                                                               \
    errnoSet (S_iosLib_INVALID_ETHERNET_ADDRESS);                   \
    return (NULL);                                                  \
    }

#define SYS_FCC_ENET_ENABLE                                         \
if (sysFccEnetEnable != NULL)                                       \
    if (sysFccEnetEnable (pDrvCtrl->immrVal, pDrvCtrl->fccNum)      \
    == ERROR)                                                       \
        return (ERROR);

#define SYS_FCC_ENET_DISABLE                                        \
if (sysFccEnetDisable != NULL)                                      \
    if (sysFccEnetDisable (pDrvCtrl->immrVal, pDrvCtrl->fccNum)     \
    == ERROR)                                                       \
        return (ERROR);

#define SYS_FCC_MII_BIT_RD(bit)                                     \
if (sysFccMiiBitRd != NULL)                                         \
    if (sysFccMiiBitRd (pDrvCtrl->immrVal, pDrvCtrl->fccNum, (bit)) \
    == ERROR)                                                       \
        return (ERROR);

#define SYS_FCC_MII_BIT_WR(bit)                                     \
if (sysFccMiiBitWr != NULL)                                         \
    if (sysFccMiiBitWr (pDrvCtrl->immrVal, pDrvCtrl->fccNum, (bit)) \
    == ERROR)                                                       \
        return (ERROR);

#define MOT_FCC_MII_WR(data, len)                 \
    {                                             \
    UINT8 i = len;                                \
                                                  \
    while (i--)                                   \
    SYS_FCC_MII_BIT_WR (((data) >> i) & 0x1);     \
    }

#define MOT_FCC_MII_RD(data, len)                 \
    {                                             \
    UINT8 i = len;                                \
    INT8 bitVal = 0;                              \
                                                  \
    while (i--)                                   \
    {                                             \
    (data) <<= 1;                                 \
    SYS_FCC_MII_BIT_RD (&bitVal);                 \
    (data) |= bitVal & 0x1;                       \
    }                                             \
    }


/* driver flags */

#define MOT_FCC_OWN_BUF_MEM 0x01    /* internally provided memory for data*/
#define MOT_FCC_INV_TBD_NUM 0x02    /* invalid tbdNum provided */
#define MOT_FCC_INV_RBD_NUM 0x04    /* invalid rbdNum provided */
#define MOT_FCC_POLLING     0x08    /* polling mode */
#define MOT_FCC_PROM        0x20    /* promiscuous mode */
#define MOT_FCC_MCAST       0x40    /* multicast addressing mode */
#define MOT_FCC_FD          0x80    /* full duplex mode */
#define MOT_FCC_OWN_BD_MEM  0x10    /* internally provided memory for BDs */

#define MOT_FCC_LOOP_NS 10

#define MOT_FCC_DEV_NAME        "motfcc"
#define MOT_FCC_DEV_NAME_LEN    7
#define MOT_FCC_MAX_DEVS        2
#define MOT_FCC_TBD_DEF_NUM     64          /* default number of TBDs */
#define MOT_FCC_RBD_DEF_NUM     32          /* default number of RBDs */
#define MOT_FCC_TX_CL_NUM       128         /* number of tx clusters */
#define MOT_FCC_TX_POLL_NUM      1          /* one TBD for poll operation */
#define MOT_FCC_TBD_MAX         128         /* max number of TBDs */
#define MOT_FCC_RBD_MAX         128         /* max number of RBDs */
#define MOT_FCC_WAIT_MAX        0xf0000000  /* max delay after sending */
#define MOT_FCC_MIN_TX_PKT_SZ   100         /* the smallest packet we send */

#define MOT_FCC_ADDR_LEN        6               /* ethernet address length */
#define MOT_FCC_FCR_DEF_VAL     M8260_FCR_BO_BE /* def value for the FCR */
#define MOT_FCC_C_MASK_VAL      0xdebb20e3      /* recommended value */
#define MOT_FCC_C_PRES_VAL      0xffffffff      /* recommended value */
#define MOT_FCC_CLEAR_VAL       0x00000000      /* clear this field */
#define MOT_FCC_RET_LIM_VAL     0xf         /* recommended value */
#define MOT_FCC_MINFLR_VAL      0x40        /* recommended value */
#define MOT_FCC_PAD_VAL         MOT_FCC_TIPTR_VAL   /* padding value */
#define MOT_FCC_MAXD_VAL        1524        /* recommended value used to be 1520*/
#define MOT_FCC_DSR_VAL         0xD555      /* recommended value */
#define MOT_FCC_FCCE_VAL        0xffff      /* clear all events */

/* rx/tx buffer descriptors definitions */

#define MOT_FCC_RBD_SZ          8       /* RBD size in byte */
#define MOT_FCC_TBD_SZ          8       /* TBD size in byte */
#define MOT_FCC_TBD_MIN        16       /* min number of TBDs */
#define MOT_FCC_RBD_MIN        16       /* min number of RBDs */
#define CL_OVERHEAD             4       /* prepended cluster overhead */
#define CL_ALIGNMENT            0x20    /* cluster required alignment */
#define MBLK_ALIGNMENT          4       /* mBlks required alignment */
#define MOT_FCC_BD_ALIGN        0x8     /* required alignment for BDs */
#define MOT_FCC_BUF_ALIGN       0x20    /* required alignment for data buffer */
#define MOT_FCC_BD_STAT_OFF     0       /* offset of the status word */
#define MOT_FCC_BD_LEN_OFF      2       /* offset of the data length=word */
#define MOT_FCC_BD_ADDR_OFF     4       /* offset of the data pointer=word */

#define MOT_FCC_RBD_ERR         (M8260_FETH_RBD_LG  |         \
                                 M8260_FETH_RBD_NO  |         \
                                 M8260_FETH_RBD_SH  |         \
                                 M8260_FETH_RBD_CR  |         \
                                 M8260_FETH_RBD_CL  |         \
                                 M8260_FETH_RBD_OV)

/* allowed PHY's speeds */

#define MOT_FCC_100MBS      100000000       /* bits per sec */
#define MOT_FCC_10MBS       10000000        /* bits per sec */

/*
 * user flags: full duplex mode, loopback mode, serial interface etc.
 * the user may configure some of this options according to his needs
 * by setting the related bits in the <userFlags> field of the load string.
 */

#define MOT_FCC_USR_PHY_NO_AN   0x00000001  /* do not auto-negotiate */
#define MOT_FCC_USR_PHY_TBL     0x00000002  /* use negotiation table */
#define MOT_FCC_USR_PHY_NO_FD   0x00000004  /* do not use full duplex */
#define MOT_FCC_USR_PHY_NO_100  0x00000008  /* do not use 100Mbit speed */
#define MOT_FCC_USR_PHY_NO_HD   0x00000010  /* do not use half duplex */
#define MOT_FCC_USR_PHY_NO_10   0x00000020  /* do not use 10Mbit speed */
#define MOT_FCC_USR_PHY_MON     0x00000040  /* use PHY Monitor */
#define MOT_FCC_USR_PHY_ISO     0x00000100  /* isolate a PHY */
#define MOT_FCC_USR_RMON        0x00000200  /* enable RMON support */
#define MOT_FCC_USR_LOOP        0x00000400  /* external loopback mode */
                                            /* only use it for testing */
#define MOT_FCC_USR_HBC         0x00000800  /* perform heartbeat control */
#define MOT_FCC_USR_BUF_LBUS    0x00001000  /* buffers are on the local bus */
#define MOT_FCC_USR_BD_LBUS     0x00002000  /* BDs are on the local bus */
#define MOT_FCC_USR_NO_ZCOPY    0x00004000  /* inhibit zcopy mode */

/* required if bufs are on local bus, optional otherwise */
#define MOT_FCC_USR_DPRAM_ALOC  0x00008000  /* Using DPRAM auto allocation */
/* allow snooping of memory operations */
#define MOT_FCC_USR_SNOOP_ENABLE 0x00010000  /* Enable snooping from FCC */

#define MOT_FCC_TBD_OK      0x1     /* the TBD is a good one */
#define MOT_FCC_TBD_BUSY    0x2     /* the TBD has not been used */
#define MOT_FCC_TBD_ERROR   0x4     /* the TBD has errors */

/* Driver State Variable */
#define MOT_FCC_STATE_INIT          0x00
#define MOT_FCC_STATE_NOT_LOADED    0x00
#define MOT_FCC_STATE_LOADED        0x01
#define MOT_FCC_STATE_NOT_RUNNING   0x00
#define MOT_FCC_STATE_RUNNING       0x02

/* frame descriptors definitions (DEPRECATED) */

typedef char *              MOT_FCC_BD_ID;
typedef MOT_FCC_BD_ID       MOT_FCC_TBD_ID;
typedef MOT_FCC_BD_ID       MOT_FCC_RBD_ID;

/*
 * this table may be customized by the user in configNet.h
 */

IMPORT INT16 motFccPhyAnOrderTbl [];

typedef struct {
    UINT32              numInts;
    UINT32              numZcopySends;
    UINT32              numNonZcopySends;
    UINT32              numTXBInts;
    UINT32              numBSYInts;
    UINT32              numRXFInts;
    UINT32              numRXBInts;
    UINT32              numRXCInts;
    UINT32              numTXCInts;
    UINT32              numTXEInts;
    UINT32              numOTHERInts;

    UINT32              numRXFHandlerEntries;
    UINT32              numRXFHandlerErrQuits;
    UINT32              numRXFHandlerFramesProcessed;
    UINT32              numRXFHandlerFramesRejected;