📄 target.ref
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the interrupt source instead of being manager by the PIC with IACK orEOI, the Critical Interrupt Summary registers are used to check for thesource. The transient values in these registers causes spurious vectorwhen indexing into the vector table.\sh TrueFFSTrueFFS is an optional product to use a flash device as a file system.To use TrueFFS, define INCLUDE_TFFS in config.h. The soldered flash is configured as drive 0, while the SODIMM flash is configured as drive 1.To use the SODIMM flash, INCLUDE_USR_FLASH should be defined in config.h.The Makefile defines cfiscs.o in MACH_EXTRA by default.\sh Flash ProgrammingThere are two flash devices on the wrSbc85xx board. The 8MB flash soldered on the board contains the bootrom for VxWorks. Only the last 1 MB is used by the bootrom. The 7 MB from the beginning is available for use. All 64MB in the SODIMM flash is available for use.To initialize and format the soldered flash for TFFS, make sureINCLUDE_TFFS_BOOTROM_OVERWRITE is not defined in config.h. Otherwise, the bootrom can be erased. Run the following commands in the target shell:\cs /@ warning: data in flash will be lost! @/ tffsRawio (0, 3, 0, 56); sysTffsFormat (0);\ceTo initialize and format the SODIMM flash for TFFS, run the following commands in the target shell:\cs /@ warning: data in flash will be lost! @/ tffsRawio (1, 3, 0, 128); sysTffsFormat (1);\ceThe above commands will take a few minutes to complete. Do notinterrupt the board during this time or risk damaging the flash.Properly formatted TFFS volumes can be mounted for use using the following commands each time vxWorks boots:\cs /@ for soldered flash @/ usrTffsConfig (0, 0, "/flash0"); /@ for SODIMM flash @/ usrTffsConfig (1, 0, "/flash1");\ceTrueFFS can also serve as a boot device. Assuming the targetis configured to access files on the host file system, thefollowing command will copy vxWorks from the host to the TFFSvolume on the target. Substitute /flash1 for the SODIMM flash:\cs copy ("vxWorks", "/flash0/vxWorks");\ceTo boot with a vxWorks image in the TFFS volume, build a bootromwith INCLUDE_TFFS defined in config.h. Program the new bootromimage into the boot flash and specify the following in theboot dialog:\cs /@ for soldered flash @/ boot device: tffs=0,0 file name : /tffs0/vxWorks /@ for SODIMM flash @/ boot device: tffs=1,0 file name : /tffs1/vxWorks\ceTrueFFS can also be used to program the bootrom. Define INCLUDE_TFFS and INCLUDE_TFFS_BOOTROM_OVERWRITE in config.h. Include the target shell component and networking. Boot the target and run "ls" to test access to the host. Note that INCLUDE_DISK_UTIL may be needed for "ls" to work.On your development host, run "make bootrom_uncmp.bin" to build a binary image of the bootrom. Copy the bootrom image to the directory where "ls"lists. Then, run this command from the target shell (without the singlequotes): 'tffsBootImagePut 0, 0x700000, "bootrom_uncmp.bin"' The secondargument, 0x700000 in this example, specifies the offset in bytes from theflash base address. Hence 0x700000 + 0xff800000 is 0xfff00000 which is thelast 1MB of the soldered flash, exactly where the bootrom should be. Notethat it will report an error that the last sector erase has failed, when infact, no such sector exists and the message can be safely ignored.Remember to undef INCLUDE_TFFS_BOOTROM_OVERWRITE afterwards or else subsequent formatting of the SODIMM flash may erase the bootrom.\sh Debug LEDVarious LED indicators are available on board for debug and diagnosticpurposes. Among them is a 7-segment numeric display unit. Here is an example use of the LED in C code: *(unsigned char *)UTIL_LED7SEG = LED_DISP_0;See wrSbc85xx.h for related macros.\sh SCSI ConfigurationThere is no SCSI interface on this board.\sh VME AccessN/A\sh PCI AccessPCI/PCI-X is not supported by this BSP.\sh RapidIO AccessRapidIO is not supported by this BSP, but is supported by the hardware.\sh Delivered ObjectsThe following images are delivered with the wrSbc85xx BSP:\ml\m -bootrom_uncmp\m -bootrom_uncmp.hex\m -bootrom_uncmp.bin\m -bootrom\m -bootrom.hex\m -bootrom.bin\m -vxWorks\m -vxWorks.sym\m -vxWorks.st\meSPECIAL CONSIDERATIONSThis section describes miscellaneous information that the user needsto know about the BSP.KNOWN PROBLEMS\sh Bootrom does not boot when build with GNU in Tornado 2.2.1Tornado 2.2.1 contains a GNU makefile with missing lines. The file is$WIND_BASE/target/h/tool/gnu/make.PPC85XXgnu. To verify the problem,run "objdumpppc --headers rom_image_name" and check the .reset section.If it does not end in 0xfffc, it is likely due to this problem. (SPR#94153)To correct this problem, add the following lines just before "TOOLENV = ppc"near the end of make.PPC85XXgnu and rebuild the bootrom:LD_SCRIPT_RAM = -defsym wrs_kernel_rom_size=0x0$(ROM_SIZE) \ -T $(TGT_DIR)/h/tool/gnu/ldscripts/link.DOTBOOTRAMLD_SCRIPT_ROM = -defsym wrs_kernel_rom_size=0x0$(ROM_SIZE) \ -T $(TGT_DIR)/h/tool/gnu/ldscripts/link.DOTBOOTROM\sh motfcc on wrSbc8560 does not work in 10BaseT modeThe FCC channels only work when connected to 100Mbsp link. When connectedto 10Mbsp link, the link LED will show a connected status, but it cannotsend or receive data, or stalls frequently. (SPR#91932)\sh Data corruption in Local Bus SDRAMData in the SDRAM on the Local Bus Controller sometimes get corrupted. Note that values read by VxWorks or the application may appear different than being read by the Wind Power ICE. The local bus SDRAM should not be used until this problem is fixed. The DDR SDRAM is not affected. (SPR#100516)\sh wrSbc8560 serial channel hangs occassionally during bootThe serial channels on the wrSbc8560 use an on-board DUART device, insteadof the on-chip DUART device on the MPC8540. With the on-board DUART device, if a key is pressed in the console terminal before the serial interrupt handler is installed, the serial does not produce output and the target appears to hang. Pressing a key in the console terminal will correct the problem. The DUART driver polls out the string "[Enter]" to the terminal as a hint when booting from ROM. (SPR#91933)The same DUART device sometimes also fails to generate the first interrupt during boot. Polling out a few characters seems to correct the problem. Hence, the reminder string "[Enter]" serves a second purpose. Note that "[Enter]" may not appear in a ROM resident image and booting may seem failed when there is no output. When in doubt, press "Enter" on the console terminal.A complication of this behavior occurs when a mezzanine card which has aCOM2 serial port is plugged onto the wrSbc8560. An example is the card withthe FCC ports and the serial channel connector. Because the workaround of polling out characters may be needed on COM2 in order for the COM1 to startprinting out characters, INCLUDE_MEZZ_COM2 needs to be defined. The workaround may confuse the BSP Validation Test Suite (VTS). When VTS isrebooting the wrSbc8560, the output "[Enter]" may cause VTS to timeout when itfailes to recognize the console output pattern after ^x or reboot() is issued.BOARD LAYOUTThe diagram below shows the location of jumpers relevant to VxWorks:\bsWR SBC 85XX REV.1 (obsolete) _______________________________________________________________________| || +-----------+ +---------------------+ XXXXXX || +~~~~~~~~~~~+ +~~~~~~~~~~~~~~~~~~~~~+ ++ ++ ++ ++ JTAG || LBC Flash LBC SDRAM ++ ++ ++ ++ ||c <--- Reset c <- SReset SW 4 5 8 7 %% || ++ %% ||-+ X Mezz card ++ SW2 +-------+ +-----+ 7-SEG ||o| TSEC2 X connector | MPC | | ~ LED ||-+ X ++ | 8540/ | | ~ || X ++ SW3 | 8560 | | DDR ~ ||-+ X ++ | | |SDRAM~ ||o| TSEC1 X ++ SW6 +-------+ | ~ ||-+ X SW9 ++ | ~ || X ++ ++ +-----+ ||-+ X ++ ++ ++ ++ ||-+ Serial X SW10 ++ ++ ++ || X SW12 SW13 SW11 ||_______________________________________________________________________| # ||| ||||||||||||||||| |||||||| ====== $$ $$ # # ||| ||||||||||||||||| |||||||| ====== $$ $$ #WR SBC 85XX REV.2 _______________________________________________________________________| || Mezz card c <- SReset XXXXXX ++ ++ SW %% || connector JTAG |; ++ ++ %% || | +;;;;;;;;;;;;;;+ |; SW1 2 ++ LEDs ||c <- Reset V | | ++ |; ++ || | DDR | ++ SW4 |; ++ |; ++ ++ ||-+ X | SDRAM | ++ SW7 |; ++ |; 3 ++ ++ ||o| TSEC2 X | | ++ |; SW5 |; JP4 ||-+ X +--------------+ ++ ++ |; |; ++ || X ++ ++ |; |; 6 ++ ||-+ X +-------+ SW 10 11 |; |; ||o| TSEC1 X | MPC | |; |; ++ ||-+ X | 8540/ | |; |; 9 ++ || X | 8560 | |; ++ SW12 ||-+ X | | ++ LBC ++ ||-+ Serial X +-------+ LBC FLASH ++ || X SDRAM ||_______________________________________________________________________| # ||| ||||||||||||||||| |||||||| ====== $$ $$ # # ||| ||||||||||||||||| |||||||| ====== $$ $$ #\be Key: ## - alignment pin || - PCI connector == - RapidIO connector $$ - RapidIO power connector c - push-in switch ++ - dip switches ~~ - SODIMM connector ;; - SODIMM connector XX - connector %% - LED indicatorBIBLIOGRAPHY\tb Motorola MPC8540 RISC Microprocessor User's Manual \tb Motorola MPC8560 RISC Microprocessor User's Manual \tb Motorola PowerPC Microprocessor Family: The Programming Environments \tb Wind River SBC8560/40 Engineering Reference Guide
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