emif.c

个人所写TMS320VC5509外部接口源程序。包含有EMIF.C,EVMLOGIC.C,INTELFLASH.C,SDRAD.C,TIMER.C

/*
 *  Copyright (C) 2001, Spectrum Digital, Inc.  All Rights Reserved.
 */
 
#include "5509.h"
#include "util.h"

void Emif_Init()
{
    //volatile unsigned int *pmem;
    //unsigned int i, n;
    
    PC55XX_EMIF pEmif = (PC55XX_EMIF)C55XX_EMIF_ADDR;
    PC55XX_EXTBUS pExtBus = (PC55XX_EXTBUS)C55XX_EXTBUS_ADDR;
   
    // Configure external bus, full EMIF, clocks enabled
    ClearMask(pExtBus -> exbussel, EXBUSSEL_CLKOUTDIS | EXBUSSEL_OSCDIS | EXBUSSEL_EMIFX2);
    WriteField(pExtBus -> exbussel, EXBUSSEL_PPMODE_FULL, EXBUSSEL_PPMODE);
    WriteField(pExtBus -> exbussel, EXBUSSEL_SPMODE_MCBSP, EXBUSSEL_SP1MODE);
    WriteField(pExtBus -> exbussel, EXBUSSEL_SPMODE_MMC, EXBUSSEL_SP2MODE);

    // Re-initialize EMIF state machine    
    Write(pEmif -> rst, 0);

    if (1) {
        // Configure CS0 for SDRAM
        // SDRAM is 64Mbit (4M x 16)
        WriteMask(pEmif -> ce0_1, CE1_MTYPE_SDRAM, CE1_MTYPE_MASK);
        
        WriteMask(pEmif -> sdc1,
            SDRAM_TRC_A | SDRAM_RFEN | SDRAM_TRCD_5 | SDRAM_TRP_8,
            SDRAM_TRC_MASK | SDRAM_SDSIZE | SDRAM_SDWID | SDRAM_RFEN | SDRAM_TRCD_MASK | SDRAM_TRP_MASK);
        WriteMask(pEmif -> sdc2,
            SDRAM_TRAS_8,
            SDRAM_SDACC | SDRAM_TRAS_MASK );
        
        // Perform SDRAM Initialization, need 100 microseconds before this runs
        Write(pEmif -> sdinit, 0);
    }
    
    if (1) {
        // Configure CS1 for async 16-bit
        // Intel Flash is 16Mbit (1M x 16)
        WriteMask(pEmif -> ce1_1,
            CE1_MTYPE_ASYNC16 | CE1_RDSETUP_2 | CE1_RDSTROBE_10 | CE1_RDHOLD_2,
            CE1_MTYPE_MASK | CE1_RDSETUP_MASK| CE1_RDSTROBE_MASK | CE1_RDHOLD_MASK);

        WriteMask(pEmif -> ce1_2,
            CE2_RDXHOLD_1 | CE2_WRXHOLD_1 | CE2_WRSETUP_2 | CE2_WRSTROBE_10 | CE2_WRHOLD_2,
            CE2_RDXHOLD_MASK | CE2_WRXHOLD_MASK | CE2_WRSETUP_MASK | CE2_WRSTROBE_MASK | CE2_WRHOLD_MASK);
    }

    if (1) {
        // Configure CS2 for async 16-bit
        // Used for address latch and display interface
        WriteMask(pEmif -> ce2_1,
            CE1_MTYPE_ASYNC16 | CE1_RDSETUP_2 | CE1_RDSTROBE_10 | CE1_RDHOLD_2,
            CE1_MTYPE_MASK | CE1_RDSETUP_MASK| CE1_RDSTROBE_MASK | CE1_RDHOLD_MASK);

        WriteMask(pEmif -> ce2_2,
            CE2_RDXHOLD_1 | CE2_WRXHOLD_1 | CE2_WRSETUP_2 | CE2_WRSTROBE_10 | CE2_WRHOLD_2,
            CE2_RDXHOLD_MASK | CE2_WRXHOLD_MASK | CE2_WRSETUP_MASK | CE2_WRSTROBE_MASK | CE2_WRHOLD_MASK);
    }

    // Initialize with timing for 200MHz DSP, CLKMEM = CLKOUT / 2
    WriteMask(pEmif -> egcr,
        EGCR_MEMFREQ_1 | EGCR_MEMCEN | EGCR_NOHOLD, 
        EGCR_MEMFREQ_MASK | EGCR_WPE | EGCR_MEMCEN | EGCR_NOHOLD); // EGCR_WPE
}