atl_smm10x1x120_sse.c

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/* *             Automatically Tuned Linear Algebra Software v3.8.0 *                    (C) Copyright 2006 R. Clint Whaley * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: *   1. Redistributions of source code must retain the above copyright *      notice, this list of conditions and the following disclaimer. *   2. Redistributions in binary form must reproduce the above copyright *      notice, this list of conditions, and the following disclaimer in the *      documentation and/or other materials provided with the distribution. *   3. The name of the ATLAS group or the names of its contributers may *      not be used to endorse or promote products derived from this *      software without specific written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ATLAS GROUP OR ITS CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * */#include "atlas_asm.h"/* * This routine optimized for Core2Duo, which has a relatively weak frontend, * so we have to be very careful about alignment, and things seem to work * better if we keep a register block within 128 bytes */#if !defined(MB)   #define MB 0#endif#if !defined(NB)   #define NB 0#endif#if !defined(KB)   #define KB 0#endif#if KB == 0   #error "KB must be compile time constant!"#endif#if KB/4*4 != KB   #error "KB must be a multiple of 4!"#endif#if KB > 128   #error "KB must be <= 128!"#endif#if KB != 0 && (MB/10)*10 != MB   #error "MB must be a multiple of 10!"#endif/* * Floating point (SSE) register usage */#define rA0     %xmm0#define rB0     %xmm1#define rC0     %xmm2#define rC1     %xmm3#define rC2     %xmm4#define rC3     %xmm5#define rC4     %xmm6#define rC5     %xmm7#define rC6     %xmm8#define rC7     %xmm9#define rC8     %xmm10#define rC9     %xmm11#define rCa     %xmm12#define rCb     %xmm13#define rCc     %xmm14#define rBETA   %xmm15/* * Integer register usage */#define pB0     %rax#define pA2     %rcx#define pA7     %rbx#define nlda    %rbp#define lda     %rdi#define pfA     %rsi#define ldb     %rdx#define II      %r8#define JJ      %r9#define M0      %r10#define pC0     %r11#define incAn   %r12#define incCn   %r13#define incAm   %r14/* * Prefetch defines */#if 1   #define pref2(mem) prefetcht1        mem   #define prefB(mem) prefetcht1        mem   #define prefC(mem) prefetcht0        mem#else   #define pref2(mem)   #define prefB(mem)   #define prefC(mem)#endif#if MB == 0   #define PFAINC 64#else   #define PFAINC ((MB*4+MB/4-1)/(MB/4))#endif#ifdef SCPLX   #define CMUL(arg_) 2*arg_#else   #define CMUL(arg_) arg_#endif/*                      %rdi         %rsi         %rdx             %xmm0 void ATL_USERMM(const int M, const int N, const int K, const TYPE alpha,                       %rcx            %r8            %r9              8                 const TYPE *A, const int lda, const TYPE *B, const int ldb,                        %xmm1       16             24                 const TYPE beta, TYPE *C, const int ldc)*/.text.global ATL_asmdecor(ATL_USERMM)ALIGN128ATL_asmdecor(ATL_USERMM):/* *      Save callee-saved iregs */        movq    %rbp, -8(%rsp)        movq    %rbx, -16(%rsp)        movq    %r12, -24(%rsp)        movq    %r13, -32(%rsp)        movq    %r14, -40(%rsp)/*        movq    %r15, -48(%rsp) *//* *      Load parameters */        movq    %r9, pB0        movq    %rdi, M0        movq    %rsi, JJ        movq    %r8, lda        movslq  8(%rsp), ldb        movq    16(%rsp), pC0        movslq  24(%rsp), incCn#ifdef BETAX        pshufd  $0x00, %xmm1, rBETA     # rBETA = {beta,beta,beta,beta}#endif/* *      ldx *= sizeof; */        shl     $2, lda        shl     $2, ldb        movq    lda, nlda        neg     nlda/* *      incAm = 10*lda - (increment done in K-loop) */#if KB <= 64 || 1                           /* did no += 256 increment */        lea     (lda,lda,8),incAm           /* incAm = lda*9 */        lea     (incAm, lda), incAm         /* incAm = lda*10 */#elif KB <= 128                             /* did one += 256 increment */        lea     -128(lda,lda,8),incAm       /* incAm = lda*9 - 128 */        lea     -128(incAm, lda), incAm     /* incAm = lda*10 - 256 */#endif/* *      pA2 = pA + 2*lda + 128;  pA7 = pA+7*lda + 128;  pB0 += 128 */        lea     (lda,lda,2), pA7        /* pA7 = 3*lda */        sub     $-128, pA2              /* pA2 = pA2 + 128 */        lea     (pA7,lda,4), pA7        /* pA7 = 7*lda */        add     pA2, pA7                /* pA7 = pA0 + 7*lda + 128 */        sub     $-128, pB0              /* pB0 = pB0 + 128 */        lea     (pA2, lda,2), pA2       /* pA2 = pA0 + 2*lda + 128 *//* *      incAn = lda*M*sizeof */        movq    M0, incAn        imulq   lda, incAn              /* incAn = lda*M */        lea     (pA2,incAn), pfA        /* pfA = pA0+2*lda + M*lda + 128 */        lea     -128(pfA,nlda,2), pfA   /* pfA = pA0 + M*lda *//* *      incCn = (ldc-M)*sizeof */        sub     M0, incCn#ifdef SCPLX        shl     $3, incCn#else        shl     $2, incCn#endifNLOOP:        movq    M0, II        prefB(-128(pB0,ldb))#if KB > 32        prefB((pB0,ldb))#endif#if KB > 64        prefB(128(pB0,ldb))#endif#if KB > 96        prefB(256(pB0,ldb))#endifALIGN16MLOOP:        prefC((pC0))#define MY_ALIGN/* * Start the KLOOP */	movaps	-128(pB0), rB0					pref2((pfA))					add $PFAINC, pfA	movaps	-128(pA2,nlda,2), rC0	mulps	rB0,rC0	movaps	-128(pA2,nlda), rC1	mulps	rB0,rC1	movaps	-128(pA2), rC2	mulps	rB0,rC2	movaps	-128(pA2,lda), rC3	mulps	rB0,rC3	movaps	-128(pA2,lda,2), rC4	mulps	rB0,rC4	movaps	-128(pA7,nlda,2), rC5	mulps	rB0,rC5	movaps	-128(pA7,nlda), rC6	mulps	rB0,rC6	movaps	-128(pA7), rC7	mulps	rB0,rC7	movaps	-128(pA7,lda), rC8	mulps	rB0,rC8	movaps	-128(pA7,lda,2), rC9	mulps	rB0,rC9#ifdef BETA0        nop        nop        nop#elif defined(BETA1)#endif#if KB > 4	movaps	16-128(pB0), rB0	movaps	16-128(pA2,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC0	movaps	16-128(pA2,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC1	movaps	16-128(pA2), rA0	mulps	rB0,rA0	addps	rA0,rC2	movaps	16-128(pA2,lda), rA0	mulps	rB0,rA0	addps	rA0,rC3	movaps	16-128(pA2,lda,2), rA0	mulps	rB0,rA0	addps	rA0,rC4	movaps	16-128(pA7,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC5	movaps	16-128(pA7,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC6	movaps	16-128(pA7), rA0	mulps	rB0,rA0	addps	rA0,rC7	movaps	16-128(pA7,lda), rA0	mulps	rB0,rA0	addps	rA0,rC8	mulps	16-128(pA7,lda,2), rB0	addps	rB0,rC9#endif#if KB > 8	MY_ALIGN	movaps	32-128(pB0), rB0	movaps	32-128(pA2,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC0	movaps	32-128(pA2,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC1	movaps	32-128(pA2), rA0	mulps	rB0,rA0	addps	rA0,rC2	movaps	32-128(pA2,lda), rA0	mulps	rB0,rA0	addps	rA0,rC3	movaps	32-128(pA2,lda,2), rA0	mulps	rB0,rA0	addps	rA0,rC4	movaps	32-128(pA7,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC5	movaps	32-128(pA7,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC6	movaps	32-128(pA7), rA0	mulps	rB0,rA0	addps	rA0,rC7	movaps	32-128(pA7,lda), rA0	mulps	rB0,rA0	addps	rA0,rC8	mulps	32-128(pA7,lda,2), rB0	addps	rB0,rC9#endif#if KB > 12	MY_ALIGN	movaps	48-128(pB0), rB0	movaps	48-128(pA2,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC0	movaps	48-128(pA2,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC1	movaps	48-128(pA2), rA0	mulps	rB0,rA0	addps	rA0,rC2	movaps	48-128(pA2,lda), rA0	mulps	rB0,rA0	addps	rA0,rC3	movaps	48-128(pA2,lda,2), rA0	mulps	rB0,rA0	addps	rA0,rC4	movaps	48-128(pA7,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC5	movaps	48-128(pA7,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC6	movaps	48-128(pA7), rA0	mulps	rB0,rA0	addps	rA0,rC7	movaps	48-128(pA7,lda), rA0	mulps	rB0,rA0	addps	rA0,rC8	mulps	48-128(pA7,lda,2), rB0	addps	rB0,rC9#endif#if KB > 16	MY_ALIGN	movaps	64-128(pB0), rB0	movaps	64-128(pA2,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC0	movaps	64-128(pA2,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC1	movaps	64-128(pA2), rA0	mulps	rB0,rA0	addps	rA0,rC2	movaps	64-128(pA2,lda), rA0	mulps	rB0,rA0	addps	rA0,rC3	movaps	64-128(pA2,lda,2), rA0	mulps	rB0,rA0	addps	rA0,rC4	movaps	64-128(pA7,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC5	movaps	64-128(pA7,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC6	movaps	64-128(pA7), rA0	mulps	rB0,rA0	addps	rA0,rC7	movaps	64-128(pA7,lda), rA0	mulps	rB0,rA0	addps	rA0,rC8	mulps	64-128(pA7,lda,2), rB0	addps	rB0,rC9#endif#if KB > 20	MY_ALIGN	movaps	80-128(pB0), rB0	movaps	80-128(pA2,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC0	movaps	80-128(pA2,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC1	movaps	80-128(pA2), rA0	mulps	rB0,rA0	addps	rA0,rC2	movaps	80-128(pA2,lda), rA0	mulps	rB0,rA0	addps	rA0,rC3	movaps	80-128(pA2,lda,2), rA0	mulps	rB0,rA0	addps	rA0,rC4	movaps	80-128(pA7,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC5	movaps	80-128(pA7,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC6	movaps	80-128(pA7), rA0	mulps	rB0,rA0	addps	rA0,rC7	movaps	80-128(pA7,lda), rA0	mulps	rB0,rA0	addps	rA0,rC8	mulps	80-128(pA7,lda,2), rB0	addps	rB0,rC9#endif#if KB > 24	MY_ALIGN	movaps	96-128(pB0), rB0	movaps	96-128(pA2,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC0	movaps	96-128(pA2,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC1	movaps	96-128(pA2), rA0	mulps	rB0,rA0	addps	rA0,rC2	movaps	96-128(pA2,lda), rA0	mulps	rB0,rA0	addps	rA0,rC3	movaps	96-128(pA2,lda,2), rA0	mulps	rB0,rA0	addps	rA0,rC4	movaps	96-128(pA7,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC5	movaps	96-128(pA7,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC6	movaps	96-128(pA7), rA0	mulps	rB0,rA0	addps	rA0,rC7	movaps	96-128(pA7,lda), rA0	mulps	rB0,rA0	addps	rA0,rC8	mulps	96-128(pA7,lda,2), rB0	addps	rB0,rC9#endif#if KB > 28	MY_ALIGN	movaps	112-128(pB0), rB0	movaps	112-128(pA2,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC0	movaps	112-128(pA2,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC1	movaps	112-128(pA2), rA0	mulps	rB0,rA0	addps	rA0,rC2	movaps	112-128(pA2,lda), rA0	mulps	rB0,rA0	addps	rA0,rC3	movaps	112-128(pA2,lda,2), rA0	mulps	rB0,rA0	addps	rA0,rC4	movaps	112-128(pA7,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC5	movaps	112-128(pA7,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC6	movaps	112-128(pA7), rA0	mulps	rB0,rA0	addps	rA0,rC7	movaps	112-128(pA7,lda), rA0	mulps	rB0,rA0	addps	rA0,rC8	mulps	112-128(pA7,lda,2), rB0	addps	rB0,rC9#endif#ifndef BETA0                           /* cplx = XX c1 XX c0 */        movups  (pC0), rCa              /* rCa  = c3 c2 c1 c0 */#endif#if KB > 32	MY_ALIGN	movaps	128-128(pB0), rB0	movaps	128-128(pA2,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC0	movaps	128-128(pA2,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC1	movaps	128-128(pA2), rA0	mulps	rB0,rA0	addps	rA0,rC2	movaps	128-128(pA2,lda), rA0	mulps	rB0,rA0	addps	rA0,rC3	movaps	128-128(pA2,lda,2), rA0	mulps	rB0,rA0	addps	rA0,rC4	movaps	128-128(pA7,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC5	movaps	128-128(pA7,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC6	movaps	128-128(pA7), rA0	mulps	rB0,rA0	addps	rA0,rC7	movaps	128-128(pA7,lda), rA0	mulps	rB0,rA0	addps	rA0,rC8	mulps	128-128(pA7,lda,2), rB0	addps	rB0,rC9#endif#ifndef BETA0   #ifdef SCPLX        movups  16(pC0), rCc            /* rCc  = XX c3 XX c2 */   #else        movups  16(pC0), rCb            /* rCb  = c7 c6 c5 c4 */   #endif#endif#if KB > 36	MY_ALIGN	movaps	144-128(pB0), rB0	movaps	144-128(pA2,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC0	movaps	144-128(pA2,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC1	movaps	144-128(pA2), rA0	mulps	rB0,rA0	addps	rA0,rC2	movaps	144-128(pA2,lda), rA0	mulps	rB0,rA0	addps	rA0,rC3	movaps	144-128(pA2,lda,2), rA0	mulps	rB0,rA0	addps	rA0,rC4	movaps	144-128(pA7,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC5	movaps	144-128(pA7,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC6	movaps	144-128(pA7), rA0	mulps	rB0,rA0	addps	rA0,rC7	movaps	144-128(pA7,lda), rA0	mulps	rB0,rA0	addps	rA0,rC8	mulps	144-128(pA7,lda,2), rB0	addps	rB0,rC9#endif#ifndef BETA0   #ifdef SCPLX        movups  32(pC0), rCb            /* rCb  = XX c5 XX c4 */   #else        movups  32(pC0), rCc            /* rCc  = XX XX c9 c8 */   #endif#endif#if defined(SCPLX) && !defined(BETA0)        shufps  $0x88, rCc, rCa   	/* rCa = c3 c2 c1 c0 */#endif#if KB > 40	MY_ALIGN	movaps	160-128(pB0), rB0	movaps	160-128(pA2,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC0	movaps	160-128(pA2,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC1	movaps	160-128(pA2), rA0	mulps	rB0,rA0	addps	rA0,rC2	movaps	160-128(pA2,lda), rA0	mulps	rB0,rA0	addps	rA0,rC3	movaps	160-128(pA2,lda,2), rA0	mulps	rB0,rA0	addps	rA0,rC4	movaps	160-128(pA7,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC5	movaps	160-128(pA7,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC6	movaps	160-128(pA7), rA0	mulps	rB0,rA0	addps	rA0,rC7	movaps	160-128(pA7,lda), rA0	mulps	rB0,rA0	addps	rA0,rC8	mulps	160-128(pA7,lda,2), rB0	addps	rB0,rC9#endif#if KB > 44	MY_ALIGN	movaps	176-128(pB0), rB0	movaps	176-128(pA2,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC0	movaps	176-128(pA2,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC1	movaps	176-128(pA2), rA0	mulps	rB0,rA0	addps	rA0,rC2	movaps	176-128(pA2,lda), rA0	mulps	rB0,rA0	addps	rA0,rC3	movaps	176-128(pA2,lda,2), rA0	mulps	rB0,rA0	addps	rA0,rC4	movaps	176-128(pA7,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC5	movaps	176-128(pA7,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC6	movaps	176-128(pA7), rA0	mulps	rB0,rA0	addps	rA0,rC7	movaps	176-128(pA7,lda), rA0	mulps	rB0,rA0	addps	rA0,rC8	mulps	176-128(pA7,lda,2), rB0	addps	rB0,rC9#endif#if KB > 48	MY_ALIGN	movaps	192-128(pB0), rB0	movaps	192-128(pA2,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC0	movaps	192-128(pA2,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC1	movaps	192-128(pA2), rA0	mulps	rB0,rA0	addps	rA0,rC2	movaps	192-128(pA2,lda), rA0	mulps	rB0,rA0	addps	rA0,rC3	movaps	192-128(pA2,lda,2), rA0	mulps	rB0,rA0	addps	rA0,rC4	movaps	192-128(pA7,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC5	movaps	192-128(pA7,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC6	movaps	192-128(pA7), rA0	mulps	rB0,rA0	addps	rA0,rC7	movaps	192-128(pA7,lda), rA0	mulps	rB0,rA0	addps	rA0,rC8	mulps	192-128(pA7,lda,2), rB0	addps	rB0,rC9#endif#if KB > 52	MY_ALIGN	movaps	208-128(pB0), rB0	movaps	208-128(pA2,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC0	movaps	208-128(pA2,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC1	movaps	208-128(pA2), rA0	mulps	rB0,rA0	addps	rA0,rC2	movaps	208-128(pA2,lda), rA0	mulps	rB0,rA0	addps	rA0,rC3	movaps	208-128(pA2,lda,2), rA0	mulps	rB0,rA0	addps	rA0,rC4	movaps	208-128(pA7,nlda,2), rA0	mulps	rB0,rA0	addps	rA0,rC5	movaps	208-128(pA7,nlda), rA0	mulps	rB0,rA0	addps	rA0,rC6	movaps	208-128(pA7), rA0	mulps	rB0,rA0	addps	rA0,rC7	movaps	208-128(pA7,lda), rA0	mulps	rB0,rA0	addps	rA0,rC8	mulps	208-128(pA7,lda,2), rB0	addps	rB0,rC9#endif#if KB > 56	MY_ALIGN
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atl_smm10x1x120_sse.c - 源码说明

本页面展示了「基于Blas CLapck的.用过的人知道是干啥的」中的 atl_smm10x1x120_sse.c 源码文件，采用 C语言 编程语言编写，共 1,411 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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