📄 hardware.lst
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// Function: The partial code of hardware setting of SACM_A2000_Initial()
// or F_SACM_A2000_Initial:
// Note: The following functions are the partial code of original
// initial subroutine. (H/W setting part)
//
// Ex: F_SACM_A2000_Initial:
// ...
// call F_SP_SACM_A2000_Init_ : S480/S240/MS01 is same
// ...
// retf
////////////////////////////////////////////////////////////////////////////////
F_SP_SACM_A2000_Init_:
0000ABCC 40 92 r1=0x0000; // 24MHz, Fcpu=Fosc
0000ABCD 19 D3 13 70 [P_SystemClock]=r1 // Frequency 20MHz
0000ABCF 70 92 r1 = 0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000ABD0 19 D3 0B 70 [P_TimerA_Ctrl] = r1 // Initial Timer A
0000ABD2 09 93 00 FD r1 = 0xfd00 // 16K
0000ABD4 19 D3 0A 70 [P_TimerA_Data] = r1
0000ABD6 09 93 A8 00 r1 = 0x00A8 // Set the DAC Ctrl
0000ABD8 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000ABDA 09 93 FF FF r1 = 0xffff
0000ABDC 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
0000ABDE 40 92 r1 =0x0000 //
0000ABDF 11 93 4F 04 r1 = [R_InterruptStatus] //
0000ABE1 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
//R1 |= C_IRQ4_1KHz
0000ABE3 19 D3 4F 04 [R_InterruptStatus] = r1 //
0000ABE5 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000ABE7 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S480_Initial()
// or F_SACM_S480_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S480_Init_:
0000ABE8 40 92 r1 = 0x0000 // 24MHz Fosc
0000ABE9 19 D3 13 70 [P_SystemClock]=r1 // Initial System Clock
0000ABEB 70 92 r1=0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000ABEC 19 D3 0B 70 [P_TimerA_Ctrl]=r1 // Initial Timer A
//R1 = 0xfd00 // 16K
0000ABEE 09 93 ED FC r1 = 0xfced // 15.625K
0000ABF0 19 D3 0A 70 [P_TimerA_Data]=r1
0000ABF2 09 93 A8 00 r1 = 0x00A8 //
0000ABF4 19 D3 2A 70 [P_DAC_Ctrl] = r1 //
0000ABF6 09 93 FF FF r1 = 0xffff
0000ABF8 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
0000ABFA 11 93 4F 04 R1 = [R_InterruptStatus] //
0000ABFC 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
//R1 |= C_IRQ4_1KHz // Enable 1KHz IRQ4 for S480 decoder
0000ABFE 19 D3 4F 04 [R_InterruptStatus] = r1 //
0000AC00 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000AC02 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S240_Initial()
// or F_SACM_S240_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S240_Init_:
0000AC03 60 92 r1=0x0020;
0000AC04 19 D3 13 70 [P_SystemClock]=r1
0000AC06 09 93 A8 00 r1 = 0x00A8; //
0000AC08 19 D3 2A 70 [P_DAC_Ctrl]= r1
0000AC0A 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000AC0B 19 D3 0B 70 [P_TimerA_Ctrl] = r1;
0000AC0D 09 93 00 FE r1 = 0xfe00; // 24K
0000AC0F 19 D3 0A 70 [P_TimerA_Data] = r1;
0000AC11 09 93 FF FF r1 = 0xffff
0000AC13 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
0000AC15 11 93 4F 04 r1 = [R_InterruptStatus] //
0000AC17 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
0000AC19 19 D3 4F 04 [R_InterruptStatus] = r1 //
0000AC1B 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000AC1D 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial()
// or F_SACM_MS01_Initial:
//
// Ex: F_SACM_MS01_Initial:
// ...
// call F_SP_SACM_MS01_Init_
// call F_SP_Play_Mode0/1/2/3 ->0,1,2,3 depending on the para1
// ...
// retf
//////////////////////////////////////////////////////////////////
F_SP_SACM_MS01_Init_:
0000AC1E 40 92 r1 = 0x0000; // 24MHz, Fcpu=Fosc
0000AC1F 19 D3 13 70 [P_SystemClock] = r1; // Initial System Clock
0000AC21 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000AC22 19 D3 0B 70 [P_TimerA_Ctrl] = r1 // Initial Timer A
//R1 = 0x0003 // 8K
0000AC24 40 92 r1 = 0x0000 // Fosc/2
0000AC25 19 D3 0D 70 [P_TimerB_Ctrl] = r1; // Initial Timer B -> 8192
//R1 = 0xFFFF
0000AC27 09 93 00 FA r1 = 0xFA00 // Any time for ADPCM channel 0,1
0000AC29 19 D3 0C 70 [P_TimerB_Data] = r1 // 8K sample rate
0000AC2B 09 93 FF FF r1 = 0xffff
0000AC2D 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
0000AC2F 90 9A RETF
//........................................
F_SP_PlayMode0_: // with F_SP_SACM_MS01_Initial
0000AC30 46 92 r1 = 0x0006
0000AC31 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000AC33 09 93 00 FE r1 = 0xFE00
0000AC35 19 D3 0A 70 [P_TimerA_Data] = r1 //
0000AC37 11 93 4F 04 r1 = [R_InterruptStatus] //
0000AC39 09 A3 10 84 r1 |= C_FIQ_PWM+C_IRQ2_TMB+C_IRQ4_1KHz
0000AC3B 19 D3 4F 04 [R_InterruptStatus] = r1 //
0000AC3D 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000AC3F 90 9A RETF
F_SP_PlayMode1_: // with F_SP_SACM_MS01_Initial
0000AC40 09 93 A8 00 r1 = 0x00A8
0000AC42 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000AC44 09 93 00 FE r1 = 0xFE00
0000AC46 19 D3 0A 70 [P_TimerA_Data] = r1 //
0000AC48 11 93 4F 04 r1 = [R_InterruptStatus] //
0000AC4A 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
0000AC4C 19 D3 4F 04 [R_InterruptStatus] = r1 //
0000AC4E 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000AC50 90 9A RETF
F_SP_PlayMode2_: // with F_SP_SACM_MS01_Initial
0000AC51 09 93 A8 00 r1 = 0x00A8
0000AC53 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000AC55 09 93 9A FD r1 = 0xFD9A
0000AC57 19 D3 0A 70 [P_TimerA_Data] = r1 //
0000AC59 11 93 4F 04 r1 = [R_InterruptStatus] //
0000AC5B 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
0000AC5D 19 D3 4F 04 [R_InterruptStatus] = r1 //
0000AC5F 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000AC61 90 9A RETF
F_SP_PlayMode3_: // with F_SP_SACM_MS01_Initial
0000AC62 09 93 A8 00 r1 = 0x00A8
0000AC64 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000AC66 09 93 00 FD r1 = 0xFD00
0000AC68 19 D3 0A 70 [P_TimerA_Data] = r1 //
0000AC6A 11 93 4F 04 r1 = [R_InterruptStatus] //
0000AC6C 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
0000AC6E 19 D3 4F 04 [R_InterruptStatus] = r1 //
0000AC70 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000AC72 90 9A RETF
///////////////////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial()
// or F_SACM_MS01_Initial:
//
// Ex: F_SACM_DVR_Initial:
// ...
// call F_SP_SACM_DVR_Init_
// call F_SP_Play_Mode0/1/2/3 ->0,1,2,3 depending on the para1
// ...
// retf
// Ex1:
// F_SACM_DVR_Record: (or F_SACM_DVR_InitEncoder)
// ...
// call F_SP_SACM_DVR_Rec_Init
// ...
// retf
// Ex2:
// F_SACM_DVR_Play: (or F_SACM_DVR_InitDecoder)
// ...
// call F_SP_SACM_DVR_Play_Init_
// ...
// retf
///////////////////////////////////////////////////////////////////////////////
F_SP_SACM_DVR_Init_:
0000AC73 40 92 r1 = 0x0000; // 24MHz, Fcpu=Fosc
0000AC74 19 D3 13 70 [P_SystemClock] = r1; // Frequency 20MHz
0000AC76 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000AC77 19 D3 0B 70 [P_TimerA_Ctrl] = r1;
0000AC79 09 93 00 FA r1 = 0xfa00; // 8K @ 24.576MHz
//r1 = 0xfb1d; // 8K @ 20MHz
0000AC7B 19 D3 0A 70 [P_TimerA_Data] = r1;
0000AC7D 75 92 r1 = 0x0035; // ADINI should be open (107)
0000AC7E 19 D3 15 70 [P_ADC_Ctrl] = r1;
0000AC80 09 93 A8 00 r1 = 0x00A8; // Set the DA Ctrl
0000AC82 19 D3 2A 70 [P_DAC_Ctrl] = r1;
0000AC84 09 93 FF FF r1 = 0xffff;
0000AC86 19 D3 11 70 [P_INT_Clear] = r1; // Clear interrupt occuiped events
0000AC88 11 93 4F 04 r1 = [R_InterruptStatus] //
0000AC8A 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
0000AC8C 19 D3 4F 04 [R_InterruptStatus] = r1 //
0000AC8E 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000AC90 90 9A RETF
F_SP_SACM_DVR_Rec_Init_: // call by SACM_DVR_Record / SACM_DVR_InitEncoder
0000AC91 75 92 r1 = 0x0035; //mic input
//r1 = 0x0037 //line_in input
0000AC92 19 D3 15 70 [P_ADC_Ctrl] = r1; //enable ADC
0000AC94 09 93 00 FE r1=0xfe00; //24K @ 24.576MHz
0000AC96 19 D3 0A 70 [P_TimerA_Data] = r1
0000AC98 90 9A RETF
F_SP_SACM_DVR_Play_Init_:
0000AC99 40 92 r1 = 0x0000 // call by SACM_DVR_Stop / SACM_DVR_Play
0000AC9A 19 D3 15 70 [P_ADC_Ctrl] = r1; // Disable ADC
0000AC9C 09 93 00 FD r1 = 0xfd00; // 16K @ 24.576MHz
0000AC9E 19 D3 0A 70 [P_TimerA_Data] = r1;
0000ACA0 90 9A RETF
///////////////////////////////////////////////////////////////////////////////
// Function: Extra Functions provided by Sunplus
// Type:
// 1. DAC Ramp up/down
// 2. IO config/import/export
// 3. Get resource data
//
//
///////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////
// Function: Ramp Up/Down to avoid speaker "pow" noise
// Destory: R1,R2
////////////////////////////////////////////////////////
_SP_RampUpDAC1: .PROC
F_SP_RampUpDAC1:
0000ACA1 90 D4 push r1,r2 to [sp]
0000ACA2 11 93 17 70 r1=[P_DAC1]
0000ACA4 09 B3 C0 FF r1 &= ~0x003f
0000ACA6 09 43 00 80 cmp r1,0x8000
0000ACA8 0E 0E jb L_RU_NormalUp
0000ACA9 19 5E je L_RU_End
L_RU_DownLoop:
0000ACAA 40 F0 0D AD call F_Delay
0000ACAC 41 94 r2 = 0x0001
0000ACAD 1A D5 12 70 [P_Watchdog_Clear] = r2
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