ledt18.vhd

EDA的一些小实例

LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
USE IEEE.std_logic_unsigned.all;
USE IEEE.std_logic_arith.all;
ENTITY ledt18 IS
	PORT(
		clk	: IN	STD_LOGIC;
        mode: in STD_LOGIC_VECTOR(2 downto 0);
		q: OUT	STD_LOGIC_VECTOR(17 downto 0));
END ledt18;
ARCHITECTURE led OF ledt18 IS
SIGNAL f:  STD_LOGIC_VECTOR(17 downto 0);
SIGNAL f_scan1: STD_LOGIC;
signal c : std_logic;

BEGIN
	q(17 downto 0) <= f(17 downto 0);
    counter:
	PROCESS
		--VARIABLE d_ff: STD_LOGIC_VECTOR(20 downto 0);     -- hl    
        VARIABLE d_ff: STD_LOGIC_VECTOR(2 downto 0);    --hl

	BEGIN
		WAIT UNTIL clk = '1';
		--IF d_ff(20 downto 0) >= 2e6 THEN
        --IF d_ff(2 downto 0) >= 2 THEN      -- hl

         --   d_ff(2 downto 0) := "000";                  -- hl

		    --d_ff(20 downto 0) := "000000000000000000000";           -- hl
		--ELSE
		   d_ff := d_ff + 1;                    -- hl

             --d_ff(20 downto 0) := d_ff + 1;                    -- hl
		--END IF;
		f_scan1 <= not d_ff(2);	
	END PROCESS counter;
	running:
	PROCESS(f_scan1)
	VARIABLE direction: STD_ULOGIC;
	BEGIN
	if f(17)='1' then c<='1';
   				 elsif f(0)='1'	then c<='0';        
				end if;

If (f_scan1 = '1' and f_scan1'EVENT) THEN	
		CASE mode IS
		   WHEN "000" =>
			    IF f(17 downto 0) =  "000000000000000000" THEN
			       f(17 downto 0) <= "100000000000000000";                  --hl
			    ELSIF f(17 downto 0) =  "111111111111111111" THEN
			       f(17 downto 0) <= "000000000000000000";
      	        ELSE 
       		       --f(17 downto 0) <= ('1'& f(17 downto 9) & f(8 downto 0) & '1');
                     f(17 downto 0) <= ('1'& f(17 downto 0) );
		    	END IF;
		   WHEN "001" =>
			       IF f(17 downto 0) =  "000000000000000000" THEN
		       f(17 downto 0) <= "000000001100000000";
			    ELSIF f(17 downto 0) = "111111111111111111" THEN
				   f(17 downto 0) <=  "000000000000000000";
				ELSE
       		       f(17 downto 0) <= ( f(17 downto 9)& '1' &  '1' & f(8 downto 1));
		    	END IF;
	    	
           WHEN "010" =>
		     IF f(17 downto 0) =  "000000000000000000" THEN
		           f(17 downto 0) <= "000000001100000000"; 
                      ELSIF f(17) = '1' AND F(0)='1' THEN
				      f(17 downto 0) <=  ( f(17 downto 9)& '0' &  '0' & f(8 downto 1));
			          ELSE
                       f(17 downto 0) <= ( f(17 downto 9)& '1' &  '1' & f(8 downto 1));
                      END IF;
           WHEN "011" =>
			    IF f(17 downto 0) =  "000000000000000000" THEN
			           f(17 downto 0) <= "100000000000000001"; 
                     ELSIF F(14)='1' AND  f(3) ='1'THEN
				     f(17 downto 0) <=  ( '0' & f(17 downto 1));
			          ELSE 
                       f(17 downto 0) <= ( f(3 downto 0)& '1' THEN f(11 downto 9) & '1' THEN f(14)&'1'& '1'&f(17 downto 15)THEN '1' & f(8 downto 6)then '1' & f(3));
                      END IF;
 
               WHEN others =>
			    IF f(17 downto 0) =    "000000000000000000" THEN
			       f(17 downto 0) <=   "111111111111111111";
			    ELSE f(17 downto 0) <= "000000000000000000" ;
			END IF;
           	END CASE;
        END IF;
	END PROCESS running;
END led;