de2_default.smp_dump.txt

来自「噪生消除的VRILOG实现」· 文本 代码 · 共 15 行

State Machine - |DE2_Default|state
Name state.0010 state.0001 state.0011 state.1000 state.0101 
state.1000 0 0 0 0 0 
state.0011 0 0 1 1 0 
state.0001 0 1 0 1 0 
state.0010 1 0 0 1 0 
state.0101 0 0 0 1 1 

State Machine - |DE2_Default|I2C_AV_Config:u3|mSetup_ST
Name mSetup_ST.0000 mSetup_ST.0010 mSetup_ST.0001 
mSetup_ST.0000 0 0 0 
mSetup_ST.0001 1 0 1 
mSetup_ST.0010 1 1 0