de2_default.fit.summary

噪生消除的VRILOG实现

Fitter Status : Successful - Mon Oct 01 08:37:13 2007
Quartus II Version : 6.0 Build 202 06/20/2006 SP 1 SJ Web Edition
Revision Name : DE2_Default
Top-level Entity Name : DE2_Default
Family : Cyclone II
Device : EP2C35F672C6
Timing Models : Final
Total logic elements : 692 / 33,216 ( 2 % )
Total registers : 476
Total pins : 429 / 475 ( 90 % )
Total virtual pins : 0
Total memory bits : 4,608 / 483,840 ( < 1 % )
Embedded Multiplier 9-bit elements : 4 / 70 ( 6 % )
Total PLLs : 1 / 4 ( 25 % )