branch.vhd

modelsim+dc开发的4级流水线结构的MIPS CPU

--choose the next pc according to branch and jump instruction
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.mips_pack.all;

entity branch is
    port(zero_in: in std_ulogic;
         sign_in: in std_ulogic;
         op_in:    in std_ulogic_vector(2 downto 0);
         pcsrc:    out std_ulogic;
         pcbrch:   out std_ulogic
         );
end entity branch;

architecture behavior of branch is 
begin
process(sign_in,zero_in,op_in) is
    begin
        case op_in is
           when BR_BEQ =>
              pcsrc<=zero_in;
              pcbrch<=zero_in;  
           when BR_BNE =>
              pcsrc<= not zero_in;
              pcbrch<= not zero_in; 
            when BR_BGTZ =>
              pcsrc<=sign_in;
              pcbrch<=sign_in;         
           when BR_BLTZ =>
              pcsrc<= not sign_in;
              pcbrch<= not sign_in;        
           when BR_JUMP =>
              pcsrc<='1';
              pcbrch<='0';        
           when BR_JR =>
              pcsrc<='1';
              pcbrch<='0';        
           when BR_JAL =>
              pcsrc<='1';
              pcbrch<='0';
           when others =>
              pcsrc<='0';
              pcbrch<='0';        
        end case;
        
end process;
end architecture;