ac97.h

pxa270触摸屏驱动程序

static
UINT32  Ac97GetNumReady (Ac97ContextT* ctxP, int *numReady);
-------------=================----------

// 0x26
@@@
static
UINT32  Ac97GetPowerDownCtrlStat (Ac97ContextT* ctxP, PUINT32 powerDownCtrlStatP);

static
UINT32  Ac97SetPowerDownCtrlStat (Ac97ContextT* ctxP, UINT32  powerDownCtrlStat);

static
UINT32  Ac97PowerDownTheAnalogMixer (Ac97ContextT* ctxP );

static
UINT32  Ac97PowerDownTheACLink (Ac97ContextT* ctxP );  // How does this apply to 1ary, 2ary codecs?

static
UINT32  Ac97PowerDownTheInternalClock (Ac97ContextT* ctxP );

static
UINT32  Ac97PowerDownTheHeadPhoneOut (Ac97ContextT* ctxP );


static
UINT32  Ac97ResetRegistersModem (Ac97ContextT* ctxP);   // ??

-------------=================----------



/**********  AC97 Extended (2.0) Audio mixer registers (0x28-0x3A) ***********/

// 0x28: extended audio configuration info and Primary vs. Secondary ID
// Use AC97_EA_ID... constants to decode.
static
UINT32 Ac97GetExtendedAudioID (Ac97ContextT* ctxP, PUINT16 eaCapabilitiesP);

// 0x2A
    // Targeted controls only?
//    static
//    UINT32 ac97GetExtendedAudioStatCtrl (Ac97ContextT* ctxP, PUINT16 eaStatCtrlP);
//    static
//    UINT32 ac97SetExtendedAudioStatCtrl (Ac97ContextT* ctxP, UINT16 eaStatCtrl);

static
UINT32 ac97SetPcmVariableRateEnable (Ac97ContextT* ctxP, BOOL enable);
static
UINT32 ac97GetPcmVariableRateEnable (Ac97ContextT* ctxP, BOOL* enableP);

//    static
//    UINT32 ac97SetMicVariableRateEnable (Ac97ContextT* ctxP, BOOL enable);
//    static
//    UINT32 ac97GetMicVariableRateEnable (Ac97ContextT* ctxP, BOOL* enableP);

// 0x2C: Controls variable rate for SDAT_OUT slots 3, 4 & 6
static
UINT32 Ac97GetPcmFrontDacRate (Ac97ContextT* ctxP, PUINT16 currentRateP);

static
UINT32 Ac97SetPcmFrontDacRate (Ac97ContextT* ctxP, UINT16 desiredRate);

// 0x2E: Controls variable rate for SDAT_OUT slots 7, 8
// Not supported by target controller

// 0x30: Controls variable rate for SDATA_OUT TS 9
// Not supported by target controller

// 0x32: Controls variable rate for SDATA_IN slots 3, 4
static
UINT32 Ac97GetPcmLrAdcRate (Ac97ContextT* ctxP, PUINT16 currentRateP);

static
UINT32 Ac97SetPcmLrAdcRate (Ac97ContextT* ctxP, UINT16 desiredRate);

// 0x34: Controls variable rate for SDATA_IN slot 5
// !!! Not in UCB1400
//static
//UINT32 Ac97GetMicAdcRate (Ac97ContextT* ctxP, PUINT16 currentRateP);
//static
//UINT32 Ac97SetMicAdcRate (Ac97ContextT* ctxP, UINT16 desiredRate);

// 0x36: PCM Center and PCM LFE use SDATA_OUT TS 6 & 9
// Not supported by target controller

// 0x38: Left + Right Surround Sound use SDATA_OUT TS 7 & 8
// Not supported by target controller

// 0x3A: Reserved


/*********** AC97 Extended (r2.0) Modem mixer registers (0x3C-0x58) **********/
// - Modem support postponed.
// - No modem in UCB1400

// 0x3C
// Read-only here: any write is a warm modem reset, covered elsewhere.
//static
//UINT32 Ac97GetExtendedModemID (Ac97ContextT* ctxP,  PUINT16 emCapabilitiesP);

// 0x3E
// Extended Modem power control and subunit readiness indicator register
//static
//UINT32 Ac97GetExtendedModemStatCtrl (Ac97ContextT* ctxP, PUINT8 emReadinessP);

//static
//UINT32 Ac97SetExtendedModemStatCtrl (Ac97ContextT* ctxP, UINT8 emPowerEnablesP)

// 0x40: Line1 uses TS 5
//static
//UINT32 Ac97GetLine1DacAdcRate (Ac97ContextT* ctxP, PUINT16 actualRateP); 

//static
//UINT32 Ac97SetLine1DacAdcRate (Ac97ContextT* ctxP, UINT16 desiredRate);

// 0x42: Line2 uses TS 10
// Not supported by target controller

// 0x44: Handset uses TS 11
// Not supported by target controller

// 0x46: Line1 uses TS 5
//static
//UINT32 Ac97GetLine1DacAdcLevel (Ac97ContextT* ctxP, PUINT8 gainLeftP, PUINT8 gainRightP, int *muteEnableP);

//static
//UINT32 Ac97SetLine1DacAdcLevel (Ac97ContextT* ctxP, UINT8 gainLeft, UINT8 gainRight, int muteEnable);

// 0x48: Line2 uses TS 10
// Not supported by target controller

// 0x4A: Handset uses TS 11
// Not supported by target controller

// Standard GPIO processing involves the use of TS12

//@@@ GPIO support postponed
//@@@ UCB1400 provides somewhat non-standard GPIO support.  Might be able
//  to use these interface functions?

// 0x4C
//static
//UINT32 Ac97GetGpioPinConfig (Ac97ContextT* ctxP, PUINT16 pinsConfigP);

//static
//UINT32 Ac97SetGpioPinConfig (Ac97ContextT* ctxP, UINT16  pinsConfig, UINT16 targetPinsMask);

// 0x4E
//static
//UINT32 Ac97GetGpioPinPolarityType (Ac97ContextT* ctxP, PUINT16 pinsPolarityTypeP);

//static
//UINT32 Ac97SetGpioPinPolarityType (Ac97ContextT* ctxP, UINT16  pinsPolarityType, UINT16 targetPinsMask);

// 0x50
//static
//UINT32 Ac97GetGpioPinSticky (Ac97ContextT* ctxP, PUINT16 );

//static
//UINT32 Ac97SetGpioPinSticky (Ac97ContextT* ctxP, UINT16  , UINT16 Mask);

// 0x52
//static
//UINT32 Ac97GetGpioPinWakeup (Ac97ContextT* ctxP, PUINT16 );

//static
//UINT32 Ac97SetGpioPinWakeup (Ac97ContextT* ctxP, UINT16  , UINT16 Mask);

// 0x54: Standard GPIO processing also uses TS 12 for reporting levels (status)
//       Standard GPIO processing uses only TS 12 for setting levels  
//       Some codecs perform the GPIO operations via Vendor reserved registers.
//          These structure members will be used for them anyway, because 
//          the logical operation is equivalent.
//static
//UINT32 Ac97GetGpioPinStatus (Ac97ContextT* ctxP, PUINT16 );

    // Bits 1..3 of SDATA_IN TS 12, normalized
//static
//UINT32 Ac97GetGpioSlot12RsvdBitsStatus (Ac97ContextT* ctxP, PUINT16 );

//static
//UINT32 Ac97ClearGpioPinStatus (Ac97ContextT* ctxP, UINT16 Mask);

    // Set any masked-in pin to either 0 or 1
//static
//UINT32 Ac97SetGpioPinStatus (Ac97ContextT* ctxP, UINT16  , UINT16 Mask);

//static           // Check Bit 0 of SDATA_IN TS 12, clear record of change to 1
//UINT32 Ac97GetAndClearGpioPinChange (Ac97ContextT* ctxP, PUINT16 );

// 0x56
//static
//UINT32 Ac97GetMiscMdmStatCtrl (Ac97ContextT* ctxP, PUINT16 );

//static
//UINT32 Ac97SetMiscMdmStatCtrl (Ac97ContextT* ctxP, UINT16, UINT16 Mask);

// 0x58 Reserved


/***************  Vendor reserved mixer registers (0x5A-0x7A) ****************/

// Philips UCB1400

// 0x5A
// I/O data 0..9: Deferred implementation (GPIO)

// 0x5C
// I/O direction 0..9: Deferred implementation (GPIO)

// 0x5E
// Positive Int Enable: leave for touch screen

// 0x60
// Negative Int Enable: leave for touch screen

// 0x62
// INT clear/status: leave for touch screen

// 0x64
// Touch screen control

// 0x66
// ADC control: touch screen

// 0x68
// ADC data: touch screen

// 0x6A
// Feature CSR1 : bass/treble control is covered in the Reg 08 functions
//               Other features are even lower priority.

// 0x6C
//  Feature CSR2: Sleep control and test modes, several loop controls.  Good
//                 features for some uses, but not first priority for driver.

// 0x6E
// (test control): Valid only during Vendor Specific Test Mode.  Not very 
//  interesting for DM.  Silicon testing, insufficient doc.

// 0x70
// 0x72
// 0x74
// 0x76
// 0x78
// 0x7A

// Other codecs
//
//
// 0x5A
// 0x5C
// 0x5E
// 0x60
// 0x62
// 0x64
// 0x66
// 0x68
// 0x6A
// 0x6C
// 0x6E
// 0x70
// 0x72
// 0x74
// 0x76
// 0x78
// 0x7A

/********************* Last two original AC97 mixer registers ****************/

// 0x7C, 0x7E
static
UINT32  Ac97GetVendorIDandRev (Ac97ContextT* ctxP, char *vendorIdP, PUINT8 revLevelP);


/***************  Services not mediated by mixer registers ****************/

static
UINT32  AC07_MuteAllUnimplemented(Ac97ContextT* ctxP );

void Ac97WriteFifoStatus (Ac97FifoProcessingInfoT* fifoInfoP, 
                          UINT32                   bitMask, 
                          INT                      setClear);

// Update mixer shadow registers
// ? Compare shadow registers?


#endif  // if 0