📄 boardcontrol.h
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/******************************************************************************
**
** COPYRIGHT (C) 2000, 2001 Intel Corporation.
**
** This software as well as the software described in it is furnished under
** license and may only be used or copied in accordance with the terms of the
** license. The information in this file is furnished for informational use
** only, is subject to change without notice, and should not be construed as
** a commitment by Intel Corporation. Intel Corporation assumes no
** responsibility or liability for any errors or inaccuracies that may appear
** in this document or any software that may be provided in association with
** this document.
** Except as permitted by such license, no part of this document may be
** reproduced, stored in a retrieval system, or transmitted in any form or by
** any means without the express written consent of Intel Corporation.
**
** FILENAME: boardControl.h
**
** PURPOSE: This module contain the board register definitions
** and some error sub-location codes
**
** LAST MODIFIED: $Modtime: 1/21/04 4:50p $
******************************************************************************/
#ifndef _boardControl_h
#define _boardControl_h
/*
************************************************************************************
* CONSTANTS
************************************************************************************
*/
// Physical Address of SRAM location.
#define BOARD_SRAM_BASE 0x5C000000
#define BOARD_SDRAM_BASE 0xA0000000
// Memory Test definitions
#define SRAM_TEST_OFFSET BOARD_SRAM_BASE
#define SDRAM_TEST_OFFSET_1 BOARD_SDRAM_BASE + 0x00400000
#define SDRAM_TEST_OFFSET_2 BOARD_SDRAM_BASE + 0x02200000
#define SRAM_TEST_LENGTH 255 * 1024
#define SDRAM_TEST_LENGTH_1 0x01E00000 // 30 MB
#define SDRAM_TEST_LENGTH_2 0x01D00000 // 29 MB
// Physical Address of the Flash memory
#define BOARD_BOOT_FLASH_BASE 0x00000000
#define BOARD_APP_FLASH_BASE 0x04000000
// Address of PCMCIA/Compact Flash
#define SLOT0_CF_IO_PHYSICAL 0x20000000
#define SLOT0_CF_ATT_PHYSICAL 0x28000000
#define SLOT0_CF_MEM_PHYSICAL 0x2C000000
#define SLOT1_CF_IO_PHYSICAL 0x30000000
#define SLOT1_CF_ATT_PHYSICAL 0x38000000
#define SLOT1_CF_MEM_PHYSICAL 0x3C000000
// Mainstone Board Register.
#define BOARD_REG_BASE 0x04000000//0x08000000 hzh
// Error sub-location codes for ERR_L_PERIPH_BDCTRL location code
#define ERR_S_PBDCTRL_IC_HWSETUP 0x01 // BoardIcHWSetup
#define ERR_S_PBDCTRL_IC_REG_HANDLER 0x02 // BoardIcRegisterHandler
#define ERR_S_PBDCTRL_IC_UNR_HANDLER 0x03 // BoardIcUnRegisterHandler
#define ERR_S_PBDCTRL_IC_DISAB_INT 0x04 // BoardIcDisableInt
#define ERR_S_PBDCTRL_IC_ENAB_INT 0x05 // BoardIcEnableInt
#define ERR_S_PBDCTRL_IC_INT_HANDLER 0x06 // BoardIcInterruptHandler
#define ERR_S_PBDCTRL_BD_HWSETUP 0x10 // BoardHWSetup
// CompactFlash GPIO pin definitions
#define CF_BVD1_PIN 9 // Compact Flash BVD1
#define CF_BVD2_PIN 3 // Compact Flash BVD2
#define CF_READY_PIN 13 // Compact Flash Interrupt
#define CF_DETECT_PIN 14 // Compact Flash Card Detect
// Serial port definitions
#define TEST_ANGEL_BTUART 0x0010
// Mask for progress indicators
#define ERR_MASK_TYPE 0xFFF
/*
*******************************************************************************
* Board Control Registers Definitions
*******************************************************************************
*/
// System Configuration Register bit settings
#define PSPR_SCR_DCID_MASK ( 0x1FU << 16 ) // Daughter Card ID
#define PSPR_SCR_DCREV_MASK ( 0x07U << 21 ) // Daughter Card Revision
#define PSPR_SCR_nMB_PRES_MASK ( 0x01U << 24 ) // Main Board is present
#define PSPR_SCR_MBREV_MASK ( 0x07U << 25 ) // Main Board Revision
#define PSPR_SCR_nEXB_PRES_MASK ( 0x01U << 28 ) // Expansion Board is present
#define PSPR_SCR_EXBID_MASK ( 0x03U << 29 ) // Expansion Board ID
#define PSPR_SCR_SWAP_FLASH_MASK ( 0x01U << 31 ) // Status of the switch SW2
#define PSPR_SCR_DCID_SHIFT 16
#define PSPR_SCR_DCREV_SHIFT 21
#define PSPR_SCR_nMB_PRES_SHIFT 24
#define PSPR_SCR_MBREV_SHIFT 25
#define PSPR_SCR_nEXB_PRES_SHIFT 28
#define PSPR_SCR_EXBID_SHIFT 29
#define PSPR_SCR_SWAP_FLASH_SHIFT 31
// LCD Configuration Register bit settings
// The PSPR_LCDCR_LCDID_MASK was formerly 0x3F. This has been changed to 0x1F
// in order to mask out the L_DD16 line which needs to be set high to reduce
// power.
#define PSPR_LCDCR_LCDID_MASK ( 0x1FU << 0 ) // Display panel ID
#define PSPR_LCDCR_ORIENT_MASK ( 0x01U << 6 ) // LCD panel orientation, 1-Landscape
// 0-Portrait
#define PSPR_LCDCR_LCDID_SHIFT 0
#define PSPR_LCDCR_ORIENT_SHIFT 6
// Power Manager Scratch Pad Register macros
#define PSPR_LCDID(x) ((x & PSPR_LCDCR_LCDID_MASK) >> PSPR_LCDCR_LCDID_SHIFT)
#define PSPR_ORIENT(x) ((x & PSPR_LCDCR_ORIENT_MASK) >> PSPR_LCDCR_ORIENT_SHIFT)
#define PSPR_DCID(x) ((x & PSPR_SCR_DCID_MASK) >> PSPR_SCR_DCID_SHIFT)
#define PSPR_DCREV(x) ((x & PSPR_SCR_DCREV_MASK) >> PSPR_SCR_DCREV_SHIFT)
#define PSPR_nMB_PRES(x) ((x & PSPR_SCR_nMB_PRES_MASK) >> PSPR_SCR_nMB_PRES_SHIFT)
#define PSPR_SCR_MBREV(x) ((x & PSPR_SCR_MBREV_MASK) >> PSPR_SCR_MBREV_SHIFT)
#define PSPR_nEXB_PRES(x) ((x & PSPR_SCR_nEXB_PRES_MASK) >> PSPR_SCR_nEXB_PRES_SHIFT)
#define PSPR_SCR_EXBID(x) ((x & PSPR_SCR_EXBID_MASK) >> PSPR_SCR_EXBID_SHIFT)
#define PSPR_SWAP_FLASH(x) ((x & PSPR_SCR_SWAP_FLASH_MASK) >> PSPR_SCR_SWAP_FLASH_SHIFT)
// Masks for Miscellaneous Write Register 1
#define MISC_WR1_SDB_SW_RESET ( 0x1U << 0 ) // System software reset
#define MISC_WR1_PDC_RESET ( 0x1U << 1 ) // Process daughtercard reset
#define MISC_WR1_ENET_EN16 ( 0x1U << 2 ) // LAN91C96 16 bit mode
#define MISC_WR1_GREEN_LED ( 0x1U << 3 ) // Misc. LED
#define MISC_WR1_IRDA_MODE ( 0x1U << 4 ) // IrDA mode
#define MISC_WR1_PDC_XTRA2 ( 0x1U << 6 ) // Process daughtercard write bit
#define MISC_WR1_LCD_DISP ( 0x1U << 8 ) // LCD_DISP signal
#define MISC_WR1_TS_CS ( 0x1U << 11 ) // Touchscreen chip select
#define MISC_WR1_RS232_DTR ( 0x1U << 12 ) // RS232 Data Terminal Ready
#define MISC_WR1_S1_PWR0 ( 0x1U << 14 ) // Compact Flash Power
#define MISC_WR1_S1_PWR1 ( 0x1U << 15 ) // Compact Flash Power
#define MASK_WR1 0x3FFF
#define MISC_WR1_IRDA_SHIFT 5
#define MISC_WR1_IRDA_PWR_MAX ( 0x0U << MISC_WR_IRDA_SHIFT)
#define MISC_WR1_IRDA_PWR_SHUT ( 0x1U << MISC_WR_IRDA_SHIFT)
#define MISC_WR1_IRDA_PWR_2_3 ( 0x2U << MISC_WR_IRDA_SHIFT)
#define MISC_WR1_IRDA_PWR_1_3 ( 0x3U << MISC_WR_IRDA_SHIFT)
#define MISC_WR1_IRDA_MASK 0x3F9F
// Masks for Miscellaneous Write Register 2
#define MISC_WR2_RADIO_WAKE ( 0x1U << 0 ) // Radio Module wakeup signal
#define MISC_WR2_RADIO_PWR ( 0x1U << 1 ) // Radio Module power control
#define MISC_WR2_AC97_SPKROFF ( 0x1U << 2 ) // AC97 CODEC amplifier control
#define MISC_WR2_I2S_SPKROFF ( 0x1U << 3 ) // I2S CODEC amplifier control
#define MISC_WR2_USB_SC ( 0x1U << 4 ) // USB Client soft connect control
// Masks for Miscellaneous Read Register 1
#define MISC_RD_MMC_WP ( 0x1U << 0 ) // SD/MMC Card write protect
#define MISC_RD_BTDCD ( 0x1U << 1 ) // BTUART Carrier Detect
#define MISC_RD_BTRI ( 0x1U << 2 ) // BTUART Ring Indicator
#define MISC_RD_BTDSR ( 0x1U << 3 ) // BTUART Data Set Ready
#define MISC_RD_TS_BUSY ( 0x1U << 4 ) // Touchscree busy
#define MISC_RD_USB_CL_STATUS ( 0x1U << 5 ) // USB Client status
#define MISC_RD_USIM_CD ( 0x1U << 6 ) // USIM Card detection
#define MISC_RD_MMC_CD ( 0x1U << 7 ) // MMC Card detection
#define MISC_RD_MEMSTK_CD ( 0x1U << 8 ) // Memory Stic detection
// Masks for the interrupt Mask/Enable Register
#define INT_MASK_ENB_MMC ( 0x1U << 0 ) // MMC/SD card insert interupt
#define INT_MASK_ENB_USIM ( 0x1U << 1 ) // USIM Card detection interrupt
#define INT_MASK_ENB_USBC ( 0x1U << 2 ) // USB client cable detection interrupt
#define INT_MASK_ENB_SMSC ( 0x1U << 3 ) // Ethernet Controller interrupt
#define INT_MASK_ENB_AC97 ( 0x1U << 4 ) // UCB1400
#define INT_MASK_ENB_BB_PEN ( 0x1U << 5 ) // ADI7873 Touch Screen digitizer
#define INT_MASK_ENB_MSINS ( 0x1U << 6 ) // Memory Stick detection interrupt
#define INT_MASK_ENB_EXBRD ( 0x1U << 7 ) // Expansion Board interrupt
#define INT_MASK_ENB_S0_CD ( 0x1U << 9 ) // PCMCIA Socket 0 card detection
#define INT_MASK_ENB_S0_STCHG ( 0x1U << 10 ) // PCMCIA Socket 0 Status changed
#define INT_MASK_ENB_S0_IRQ ( 0x1U << 11 ) // PCMCIA Socket 0 Interrupt Request
#define INT_MASK_ENB_S1_CD ( 0x1U << 13 ) // PCMCIA Socket 1 card detection
#define INT_MASK_ENB_S1_STCHG ( 0x1U << 14 ) // PCMCIA Socket 1 Status changed
#define INT_MASK_ENB_S1_IRQ ( 0x1U << 15 ) // PCMCIA Socket 1 Interrupt Request
// Masks for the interrupt Set/Clear Register
#define INT_SET_CLR_MMC ( 0x1U << 0 ) // MMC/SD card insert interupt
#define INT_SET_CLR_USIM ( 0x1U << 1 ) // USIM Card detection interrupt
#define INT_SET_CLR_USBC ( 0x1U << 2 ) // USB client cable detection interrupt
#define INT_SET_CLR_SMSC ( 0x1U << 3 ) // Ethernet Controller interrupt
#define INT_SET_CLR_AC97 ( 0x1U << 4 ) // UCB1400
#define INT_SET_CLR_BB_PEN ( 0x1U << 5 ) // ADI7873 Touch Screen digitizer
#define INT_SET_CLR_MSINS ( 0x1U << 6 ) // Memory Stick detection interrupt
#define INT_SET_CLR_EXBRD ( 0x1U << 7 ) // Expansion Board interrupt
#define INT_SET_CLR_S0_CD ( 0x1U << 9 ) // PCMCIA Socket 0 card detection
#define INT_SET_CLR_S0_STCHG ( 0x1U << 10 ) // PCMCIA Socket 0 Status changed
#define INT_SET_CLR_S0_IRQ ( 0x1U << 11 ) // PCMCIA Socket 0 Interrupt Request
#define INT_SET_CLR_S1_CD ( 0x1U << 13 ) // PCMCIA Socket 1 card detection
#define INT_SET_CLR_S1_STCHG ( 0x1U << 14 ) // PCMCIA Socket 1 Status changed
#define INT_SET_CLR_S1_IRQ ( 0x1U << 15 ) // PCMCIA Socket 1 Interrupt Request
/*
*******************************************************************************
* Platform Registers
*******************************************************************************
*/
typedef struct BoardRegistersS {
VUINT32 resv1[4]; // 0x00
VUINT32 hex_led; // 0x10
VUINT32 resv2[11]; // 0x14 - 0x3F
VUINT32 disc_blank_led; // 0x40
VUINT32 resv3[7]; // 0x44 - 0x5F
VUINT32 user_switches; // 0x60
VUINT32 resv5[7]; // 0x64 - 0x7F
VUINT32 miscWr1; // 0x80
VUINT32 miscWr2; // 0x84
VUINT32 resv6[2]; // 0x88 - 0x8F
VUINT32 miscRd; // 0x90
VUINT32 resv7[11]; // 0x94 - 0xBF
VUINT32 intMaskEnb; // 0xC0
VUINT32 resv8[3]; // 0x84 - 0x8F
VUINT32 intSetClr; // 0xD0
VUINT32 resv9[3]; // 0xD4 - 0xDF
VUINT32 pcmcia0; // 0xE0
VUINT32 pcmcia1; // 0xE4
} BoardRegistersT;
/*
*******************************************************************************
* Enumerations types
*******************************************************************************
*/
typedef enum HexLedsE
{
HexLed_D0 = 0x01, // LED0
HexLed_D1 = 0x02, // LED1
HexLed_D2 = 0x04, // LED2
HexLed_D3 = 0x08, // LED3
HexLed_D4 = 0x10, // LED4
HexLed_D5 = 0x20, // LED5
HexLed_D6 = 0x40, // LED6
HexLed_D7 = 0x80 // LED7
} HexLedsT;
typedef enum DiscrLedsE
{
DiscLed_D0 = 0x01, // LED0 - D2
DiscLed_D1 = 0x02, // LED1 - D3
DiscLed_D2 = 0x04, // LED2 - D4
DiscLed_D3 = 0x08, // LED3 - D5
DiscLed_D4 = 0x10, // LED4 - D6
DiscLed_D5 = 0x20, // LED5 - D7
DiscLed_D6 = 0x40, // LED6 - D8
DiscLed_D7 = 0x80 // LED7 - D9
} DiscrLedsT;
typedef enum DiscrLedStateE
{
LED_ON,
LED_OFF
} DiscrLedStateT;
typedef enum DiscSwitchesE
{
DiscSwitch_S3 = 0x0100, // SW3 - Bit 8
DiscSwitch_S4 = 0x0200, // SW4 - Bit 9
DiscSwitch_S6 = 0x0400, // SW6 - Bit 10
DiscSwitch_S7 = 0x0800, // SW7 - Bit 11
DiscSwitch_S8 = 0x1000, // SW8 - Bit 12
DiscSwitch_S10 = 0x2000, // SW10 - Bit 13
DiscSwitch_S11 = 0x4000, // SW11 - Bit 14
DiscSwitch_S12 = 0x8000 // SW12 - Bit 15
} DiscSwitchesT;
// Abstract these switch names
#define TurboSwitch DiscSwitch_S3
#define MemClkSwitch DiskSwitch_S4
#define FastBusSwitch DiscSwitch_S6
#define AltBootSwitch DiscSwitch_S7
#define AltIOSwitch DiscSwitch_S8
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