📄 cpu.c
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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.C
** Project : DP256B_PE_SPI
** Processor : MC9S12DP256BCPV
** Beantype : MC9S12DP256_112
** Version : Bean 02.001, Driver 02.00, CPU db: 2.87.419
** Datasheet : 9S12DP256BDGV2/D V02.15
** Compiler : CodeWarrior HC12 C Compiler
** Date/Time : 2007-4-29, 14:20
** Abstract :
** This bean "MC9S12DP256_112" implements properties, methods,
** and events of the CPU.
** Settings :
**
** Contents :
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
** SetWaitMode - void Cpu_SetWaitMode(void);
** SetStopMode - void Cpu_SetStopMode(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2006
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE Cpu. */
#include "SM1.h"
#include "Events.h"
#include "Cpu.h"
#define CGM_DELAY 1023UL
#pragma DATA_SEG DEFAULT
#pragma CODE_SEG DEFAULT
/* Global variables */
volatile byte CCR_reg; /* Current CCR reegister */
#pragma CODE_SEG __NEAR_SEG NON_BANKED
/*
** ===================================================================
** Method : Cpu_Cpu_Interrupt (bean MC9S12DP256_112)
**
** Description :
** The method services unhandled interrupt vectors.
** This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
ISR(Cpu_Interrupt)
{
asm(BGND);
}
#pragma CODE_SEG DEFAULT
/*
** ===================================================================
** Method : Cpu_DisableInt (bean MC9S12DP256_112)
**
** Description :
** Disable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_DisableInt(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_EnableInt (bean MC9S12DP256_112)
**
** Description :
** Enable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_EnableInt(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_SetStopMode (bean MC9S12DP256_112)
**
** Description :
** Set low power mode - Stop mode.
** For more information about the stop mode see
** documentation of this CPU.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_SetStopMode(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_SetWaitMode (bean MC9S12DP256_112)
**
** Description :
** Set low power mode - Wait mode.
** For more information about the wait mode see
** documentation of this CPU.
** Release from Wait mode: Reset or interrupt
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_SetWaitMode(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : _EntryPoint (bean MC9S12DP256_112)
**
** Description :
** Initializes the whole system like timing and so on. At the end
** of this function, the C startup is invoked to initialize stack,
** memory areas and so on.
** This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
extern void _Startup(void); /* Forward declaration of external startup function declared in file Start12.c */
#pragma CODE_SEG __NEAR_SEG NON_BANKED
#define INITRG_ADR 0x0011 /* Register map position register */
#pragma NO_FRAME
#pragma NO_EXIT
void _EntryPoint(void)
{
/* ### MC9S12DP256_112 "Cpu" init code ... */
/* PE initialization code after reset */
/* Initialization of the registers INITRG, INITRM, INITEE is done to protect them to be written accidentally later by the application */
*(byte*)INITRG_ADR = 0; /* Set the register map position */
asm("nop"); /* nop instruction */
/* INITRM: RAM15=0,RAM14=0,RAM13=0,RAM12=0,RAM11=1,??=0,??=0,RAMHAL=1 */
setReg8(INITRM, 9); /* Set the RAM map position */
/* INITEE: EE15=0,EE14=0,EE13=0,EE12=0,??=0,??=0,??=0,EEON=1 */
setReg8(INITEE, 1); /* Set the EEPROM map position */
/* MISC: ??=0,??=0,??=0,??=0,EXSTR1=1,EXSTR0=1,ROMHM=0,ROMON=1 */
setReg8(MISC, 13);
/* PEAR: NOACCE=0,??=0,PIPOE=0,NECLK=0,LSTRE=0,RDWE=0,??=0,??=0 */
setReg8(PEAR, 0);
/* System clock initialization */
/* CLKSEL: PLLSEL=0,PSTP=0,SYSWAI=0,ROAWAI=0,PLLWAI=0,CWAI=0,RTIWAI=0,COPWAI=0 */
setReg8(CLKSEL, 0); /* Select clock source from XTAL and set bits in CLKSEL reg. */
/* PLLCTL: CME=1,PLLON=0,AUTO=1,ACQ=1,??=0,PRE=0,PCE=0,SCME=1 */
setReg8(PLLCTL, 177); /* Disable the PLL */
/*** End of PE initialization code after reset ***/
__asm("jmp _Startup"); /* Jump to C startup code */
}
#pragma CODE_SEG DEFAULT
/*
** ===================================================================
** Method : PE_low_level_init (bean MC9S12DP256_112)
**
** Description :
** Initializes beans and provides common register initialization.
** The method is called automatically as a part of the
** application initialization code.
** This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
void PE_low_level_init(void)
{
/* Common initialization of the CPU registers */
/* DDRS: DDRS6=1,DDRS5=0,DDRS4=0 */
clrSetReg8Bits(DDRS, 48, 64);
/* PTS: PTS6=0 */
clrReg8Bits(PTS, 64);
/* CRGINT: LOCKIE=0,SCMIE=0 */
clrReg8Bits(CRGINT, 18);
/* RDRIV: RDPK=0,RDPE=0,RDPB=0,RDPA=0 */
clrReg8Bits(RDRIV, 147);
/* RDRH: RDRH7=0,RDRH6=0,RDRH5=0,RDRH4=0,RDRH3=0,RDRH2=0,RDRH1=0,RDRH0=0 */
setReg8(RDRH, 0);
/* RDRJ: RDRJ7=0,RDRJ6=0,RDRJ1=0,RDRJ0=0 */
clrReg8Bits(RDRJ, 195);
/* RDRM: RDRM7=0,RDRM6=0,RDRM5=0,RDRM4=0,RDRM3=0,RDRM2=0,RDRM1=0,RDRM0=0 */
setReg8(RDRM, 0);
/* RDRP: RDRP7=0,RDRP6=0,RDRP5=0,RDRP4=0,RDRP3=0,RDRP2=0,RDRP1=0,RDRP0=0 */
setReg8(RDRP, 0);
/* RDRS: RDRS7=0,RDRS6=0,RDRS5=0,RDRS4=0,RDRS3=0,RDRS2=0,RDRS1=0,RDRS0=0 */
setReg8(RDRS, 0);
/* RDRT: RDRT7=0,RDRT6=0,RDRT5=0,RDRT4=0,RDRT3=0,RDRT2=0,RDRT1=0,RDRT0=0 */
setReg8(RDRT, 0);
/* INTCR: IRQEN=0 */
clrReg8Bits(INTCR, 64);
/* ### MC9S12DP256_112 "Cpu" init code ... */
/* ### Synchro master "SM1" init code ... */
SM1_Init();
__EI(); /* Enable interrupts */
}
/* END Cpu. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 2.97 [03.83]
** for the Freescale HCS12 series of microcontrollers.
**
** ###################################################################
*/
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