📄 fdct_sse2_skal.asm
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;/****************************************************************************; *; * XVID MPEG-4 VIDEO CODEC; * - SSE2 forward discrete cosine transform -; *; * Copyright(C) 2003 Pascal Massimino <skal@planet-d.net>; *; * This program is free software; you can redistribute it and/or modify it; * under the terms of the GNU General Public License as published by; * the Free Software Foundation; either version 2 of the License, or; * (at your option) any later version.; *; * This program is distributed in the hope that it will be useful,; * but WITHOUT ANY WARRANTY; without even the implied warranty of; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the; * GNU General Public License for more details.; *; * You should have received a copy of the GNU General Public License; * along with this program; if not, write to the Free Software; * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA; *; * $Id: fdct_sse2_skal.asm,v 1.7 2005/08/01 10:53:46 Isibaar Exp $; *; ***************************************************************************/BITS 32%macro cglobal 1 %ifdef PREFIX %ifdef MARK_FUNCS global _%1:function %1.endfunc-%1 %define %1 _%1:function %1.endfunc-%1 %else global _%1 %define %1 _%1 %endif %else %ifdef MARK_FUNCS global %1:function %1.endfunc-%1 %else global %1 %endif %endif%endmacro;-----------------------------------------------------------------------------;; -=FDCT=-;; Vertical pass is an implementation of the scheme:; Loeffler C., Ligtenberg A., and Moschytz C.S.:; Practical Fast 1D DCT Algorithm with Eleven Multiplications,; Proc. ICASSP 1989, 988-991.;; Horizontal pass is a double 4x4 vector/matrix multiplication,; (see also Intel's Application Note 922:; http://developer.intel.com/vtune/cbts/strmsimd/922down.htm; Copyright (C) 1999 Intel Corporation); ; Notes:; * tan(3pi/16) is greater than 0.5, and would use the; sign bit when turned into 16b fixed-point precision. So,; we use the trick: x*tan3 = x*(tan3-1)+x; ; * There's only one SSE-specific instruction (pshufw).;; * There's still 1 or 2 ticks to save in fLLM_PASS, but; I prefer having a readable code, instead of a tightly; scheduled one...;; * Quantization stage (as well as pre-transposition for the; idct way back) can be included in the fTab* constants; (with induced loss of precision, somehow);; * Some more details at: http://skal.planet-d.net/coding/dct.html;;-----------------------------------------------------------------------------;; -=IDCT=-;; A little slower than fdct, because the final stages (butterflies and; descaling) require some unpairable shifting and packing, all on; the same CPU unit.;;-----------------------------------------------------------------------------;=============================================================================; Read only data;=============================================================================%ifdef FORMAT_COFFSECTION .rodata%elseSECTION .rodata align=16%endifALIGN 16tan1: times 8 dw 0x32ec ; tan( pi/16)tan2: times 8 dw 0x6a0a ; tan(2pi/16) (=sqrt(2)-1)tan3: times 8 dw 0xab0e ; tan(3pi/16)-1sqrt2: times 8 dw 0x5a82 ; 0.5/sqrt(2);-----------------------------------------------------------------------------; Inverse DCT tables;-----------------------------------------------------------------------------ALIGN 16iTab1: dw 0x4000, 0x539f, 0x4000, 0x22a3 dw 0x4000, 0xdd5d, 0x4000, 0xac61 dw 0x4000, 0x22a3, 0xc000, 0xac61 dw 0xc000, 0x539f, 0x4000, 0xdd5d dw 0x58c5, 0x4b42, 0x4b42, 0xee58 dw 0x3249, 0xa73b, 0x11a8, 0xcdb7 dw 0x3249, 0x11a8, 0xa73b, 0xcdb7 dw 0x11a8, 0x4b42, 0x4b42, 0xa73biTab2: dw 0x58c5, 0x73fc, 0x58c5, 0x300b dw 0x58c5, 0xcff5, 0x58c5, 0x8c04 dw 0x58c5, 0x300b, 0xa73b, 0x8c04 dw 0xa73b, 0x73fc, 0x58c5, 0xcff5 dw 0x7b21, 0x6862, 0x6862, 0xe782 dw 0x45bf, 0x84df, 0x187e, 0xba41 dw 0x45bf, 0x187e, 0x84df, 0xba41 dw 0x187e, 0x6862, 0x6862, 0x84dfiTab3: dw 0x539f, 0x6d41, 0x539f, 0x2d41 dw 0x539f, 0xd2bf, 0x539f, 0x92bf dw 0x539f, 0x2d41, 0xac61, 0x92bf dw 0xac61, 0x6d41, 0x539f, 0xd2bf dw 0x73fc, 0x6254, 0x6254, 0xe8ee dw 0x41b3, 0x8c04, 0x1712, 0xbe4d dw 0x41b3, 0x1712, 0x8c04, 0xbe4d dw 0x1712, 0x6254, 0x6254, 0x8c04iTab4: dw 0x4b42, 0x6254, 0x4b42, 0x28ba dw 0x4b42, 0xd746, 0x4b42, 0x9dac dw 0x4b42, 0x28ba, 0xb4be, 0x9dac dw 0xb4be, 0x6254, 0x4b42, 0xd746 dw 0x6862, 0x587e, 0x587e, 0xeb3d dw 0x3b21, 0x979e, 0x14c3, 0xc4df dw 0x3b21, 0x14c3, 0x979e, 0xc4df dw 0x14c3, 0x587e, 0x587e, 0x979eALIGN 16Walken_Idct_Rounders: dd 65536, 65536, 65536, 65536 dd 3597, 3597, 3597, 3597 dd 2260, 2260, 2260, 2260 dd 1203, 1203, 1203, 1203 dd 0, 0, 0, 0 dd 120, 120, 120, 120 dd 512, 512, 512, 512 dd 512, 512, 512, 512 times 8 dw (65536>>11) times 8 dw ( 3597>>11) times 8 dw ( 2260>>11) ; other rounders are zero...;-----------------------------------------------------------------------------; Forward DCT tables;-----------------------------------------------------------------------------ALIGN 16fTab1: dw 0x4000, 0x4000, 0x58c5, 0x4b42, dw 0xdd5d, 0xac61, 0xa73b, 0xcdb7, dw 0x4000, 0x4000, 0x3249, 0x11a8, dw 0x539f, 0x22a3, 0x4b42, 0xee58, dw 0x4000, 0xc000, 0x3249, 0xa73b, dw 0x539f, 0xdd5d, 0x4b42, 0xa73b, dw 0xc000, 0x4000, 0x11a8, 0x4b42, dw 0x22a3, 0xac61, 0x11a8, 0xcdb7fTab2: dw 0x58c5, 0x58c5, 0x7b21, 0x6862, dw 0xcff5, 0x8c04, 0x84df, 0xba41, dw 0x58c5, 0x58c5, 0x45bf, 0x187e, dw 0x73fc, 0x300b, 0x6862, 0xe782, dw 0x58c5, 0xa73b, 0x45bf, 0x84df, dw 0x73fc, 0xcff5, 0x6862, 0x84df, dw 0xa73b, 0x58c5, 0x187e, 0x6862, dw 0x300b, 0x8c04, 0x187e, 0xba41fTab3: dw 0x539f, 0x539f, 0x73fc, 0x6254, dw 0xd2bf, 0x92bf, 0x8c04, 0xbe4d, dw 0x539f, 0x539f, 0x41b3, 0x1712, dw 0x6d41, 0x2d41, 0x6254, 0xe8ee, dw 0x539f, 0xac61, 0x41b3, 0x8c04, dw 0x6d41, 0xd2bf, 0x6254, 0x8c04, dw 0xac61, 0x539f, 0x1712, 0x6254, dw 0x2d41, 0x92bf, 0x1712, 0xbe4dfTab4: dw 0x4b42, 0x4b42, 0x6862, 0x587e, dw 0xd746, 0x9dac, 0x979e, 0xc4df, dw 0x4b42, 0x4b42, 0x3b21, 0x14c3, dw 0x6254, 0x28ba, 0x587e, 0xeb3d, dw 0x4b42, 0xb4be, 0x3b21, 0x979e, dw 0x6254, 0xd746, 0x587e, 0x979e, dw 0xb4be, 0x4b42, 0x14c3, 0x587e, dw 0x28ba, 0x9dac, 0x14c3, 0xc4dfALIGN 16Fdct_Rnd0: dw 6,8,8,8, 6,8,8,8Fdct_Rnd1: dw 8,8,8,8, 8,8,8,8Fdct_Rnd2: dw 10,8,8,8, 8,8,8,8Rounder1: dw 1,1,1,1, 1,1,1,1;=============================================================================; Code;=============================================================================SECTION .textcglobal idct_sse2_skalcglobal fdct_sse2_skal;-----------------------------------------------------------------------------; Helper macro iMTX_MULT;-----------------------------------------------------------------------------%macro iMTX_MULT 4 ; %1=src, %2 = Table to use, %3=rounder, %4=Shift movdqa xmm0, [ecx+%1*16] ; xmm0 = [01234567] pshuflw xmm0, xmm0, 11011000b ; [02134567] ; these two shufflings could be pshufhw xmm0, xmm0, 11011000b ; [02134657] ; integrated in zig-zag orders pshufd xmm4, xmm0, 00000000b ; [02020202] pshufd xmm5, xmm0, 10101010b ; [46464646] pshufd xmm6, xmm0, 01010101b ; [13131313] pshufd xmm7, xmm0, 11111111b ; [57575757] pmaddwd xmm4, [%2+ 0] ; dot [M00,M01][M04,M05][M08,M09][M12,M13] pmaddwd xmm5, [%2+16] ; dot [M02,M03][M06,M07][M10,M11][M14,M15] pmaddwd xmm6, [%2+32] ; dot [M16,M17][M20,M21][M24,M25][M28,M29] pmaddwd xmm7, [%2+48] ; dot [M18,M19][M22,M23][M26,M27][M30,M31] paddd xmm4, [%3] ; Round paddd xmm6, xmm7 ; [b0|b1|b2|b3] paddd xmm4, xmm5 ; [a0|a1|a2|a3] movdqa xmm7, xmm6 paddd xmm6, xmm4 ; mm6=a+b psubd xmm4, xmm7 ; mm4=a-b psrad xmm6, %4 ; => out [0123] psrad xmm4, %4 ; => out [7654] packssdw xmm6, xmm4 ; [01237654] pshufhw xmm6, xmm6, 00011011b ; [01234567] movdqa [ecx+%1*16], xmm6%endmacro;-----------------------------------------------------------------------------; Helper macro iLLM_PASS;-----------------------------------------------------------------------------%macro iLLM_PASS 1 ; %1: src/dst movdqa xmm0, [tan3] ; t3-1 movdqa xmm3, [%1+16*3] ; x3 movdqa xmm1, xmm0 ; t3-1 movdqa xmm5, [%1+16*5] ; x5 movdqa xmm4, [tan1] ; t1 movdqa xmm6, [%1+16*1] ; x1 movdqa xmm7, [%1+16*7] ; x7 movdqa xmm2, xmm4 ; t1 pmulhw xmm0, xmm3 ; x3*(t3-1) pmulhw xmm1, xmm5 ; x5*(t3-1) paddsw xmm0, xmm3 ; x3*t3 paddsw xmm1, xmm5 ; x5*t3 psubsw xmm0, xmm5 ; x3*t3-x5 = tm35 paddsw xmm1, xmm3 ; x3+x5*t3 = tp35 pmulhw xmm4, xmm7 ; x7*t1 pmulhw xmm2, xmm6 ; x1*t1 paddsw xmm4, xmm6 ; x1+t1*x7 = tp17 psubsw xmm2, xmm7 ; x1*t1-x7 = tm17 movdqa xmm3, [sqrt2] movdqa xmm7, xmm4 movdqa xmm6, xmm2 psubsw xmm4, xmm1 ; tp17-tp35 = t1 psubsw xmm2, xmm0 ; tm17-tm35 = b3 paddsw xmm1, xmm7 ; tp17+tp35 = b0 paddsw xmm0, xmm6 ; tm17+tm35 = t2 ; xmm1 = b0, xmm2 = b3. preserved movdqa xmm6, xmm4 psubsw xmm4, xmm0 ; t1-t2 paddsw xmm0, xmm6 ; t1+t2 pmulhw xmm4, xmm3 ; (t1-t2)/(2.sqrt2) pmulhw xmm0, xmm3 ; (t1+t2)/(2.sqrt2) paddsw xmm0, xmm0 ; 2.(t1+t2) = b1 paddsw xmm4, xmm4 ; 2.(t1-t2) = b2
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