display_debug.dasm

MIPS的液晶显示原码,运行在ECLIPSE上,已通过测试.

    //lcd_puts(handle, "Hello !");
    //==mcu lcd interface initial====
    HAL_DISPLAY_CONFIG  params1;
    params1.mode     = HAL_DISPLAY_MODE_AUTO | HAL_DISPLAY_MODE_E_HIGH;
80001cfc:	24020001 	li	v0,1
80001d00:	afa20028 	sw	v0,40(sp)
    params1.buswidth = HAL_DISPLAY_BUS_WIDTH_8;     
80001d04:	24020008 	li	v0,8
80001d08:	afa2002c 	sw	v0,44(sp)
    params1.period   = 450;
80001d0c:	240201c2 	li	v0,450
80001d10:	afa20030 	sw	v0,48(sp)
#include <hal/usip/hal_sys.h>

typedef void (*hal_display_handler_t)(int event);

__hal_defunc1(hal_display_init, HAL_DISPLAY_CONFIG *, params);
80001d14:	27a20028 	addiu	v0,sp,40
80001d18:	afa20024 	sw	v0,36(sp)
80001d1c:	3c028001 	lui	v0,0x8001
80001d20:	3442f3fc 	ori	v0,v0,0xf3fc
80001d24:	8c420000 	lw	v0,0(v0)
80001d28:	8fa40024 	lw	a0,36(sp)
80001d2c:	0040f809 	jalr	v0
80001d30:	00000000 	nop
80001d34:	afa20020 	sw	v0,32(sp)
    hal_display_init(&params1);     
    //===============================
    result=s6b0724_write_command(lcd_bias);      //bias
80001d38:	240400a0 	li	a0,160
80001d3c:	3c028000 	lui	v0,0x8000
80001d40:	24421fdc 	addiu	v0,v0,8156
80001d44:	0040f809 	jalr	v0
80001d48:	00000000 	nop
80001d4c:	afa20010 	sw	v0,16(sp)
    result=s6b0724_write_command(adc);           //adc
80001d50:	240400a0 	li	a0,160
80001d54:	3c028000 	lui	v0,0x8000
80001d58:	24421fdc 	addiu	v0,v0,8156
80001d5c:	0040f809 	jalr	v0
80001d60:	00000000 	nop
80001d64:	afa20010 	sw	v0,16(sp)
    result=s6b0724_write_command(shl);           //shl
80001d68:	240400c8 	li	a0,200
80001d6c:	3c028000 	lui	v0,0x8000
80001d70:	24421fdc 	addiu	v0,v0,8156
80001d74:	0040f809 	jalr	v0
80001d78:	00000000 	nop
80001d7c:	afa20010 	sw	v0,16(sp)
    for(i=0;i<2000;i++) ;                 //delay 2ms
80001d80:	afa00014 	sw	zero,20(sp)
80001d84:	8fa20014 	lw	v0,20(sp)
80001d88:	284207d0 	slti	v0,v0,2000
80001d8c:	10400006 	beqz	v0,80001da8 <_sp+0x1e8>
80001d90:	00000000 	nop
80001d94:	8fa20014 	lw	v0,20(sp)
80001d98:	24420001 	addiu	v0,v0,1
80001d9c:	afa20014 	sw	v0,20(sp)
80001da0:	1000fff8 	b	80001d84 <_sp+0x1c4>
80001da4:	00000000 	nop
    result=s6b0724_write_command(power_control); //power control
80001da8:	2404002f 	li	a0,47
80001dac:	3c028000 	lui	v0,0x8000
80001db0:	24421fdc 	addiu	v0,v0,8156
80001db4:	0040f809 	jalr	v0
80001db8:	00000000 	nop
80001dbc:	afa20010 	sw	v0,16(sp)
    for(i=0;i<2000;i++) ;                 //delay 2ms
80001dc0:	afa00014 	sw	zero,20(sp)
80001dc4:	8fa20014 	lw	v0,20(sp)
80001dc8:	284207d0 	slti	v0,v0,2000
80001dcc:	10400006 	beqz	v0,80001de8 <_sp+0x228>
80001dd0:	00000000 	nop
80001dd4:	8fa20014 	lw	v0,20(sp)
80001dd8:	24420001 	addiu	v0,v0,1
80001ddc:	afa20014 	sw	v0,20(sp)
80001de0:	1000fff8 	b	80001dc4 <_sp+0x204>
80001de4:	00000000 	nop
    result=s6b0724_write_command(regulator_resistor);       //regulator resistor select
80001de8:	24040026 	li	a0,38
80001dec:	3c028000 	lui	v0,0x8000
80001df0:	24421fdc 	addiu	v0,v0,8156
80001df4:	0040f809 	jalr	v0
80001df8:	00000000 	nop
80001dfc:	afa20010 	sw	v0,16(sp)
    for(i=0;i<2000;i++) ;                            //delay 2ms
80001e00:	afa00014 	sw	zero,20(sp)
80001e04:	8fa20014 	lw	v0,20(sp)
80001e08:	284207d0 	slti	v0,v0,2000
80001e0c:	10400006 	beqz	v0,80001e28 <_sp+0x268>
80001e10:	00000000 	nop
80001e14:	8fa20014 	lw	v0,20(sp)
80001e18:	24420001 	addiu	v0,v0,1
80001e1c:	afa20014 	sw	v0,20(sp)
80001e20:	1000fff8 	b	80001e04 <_sp+0x244>
80001e24:	00000000 	nop
    result=s6b0724_write_command(reference_volt_mode);      //reference voltage mode
80001e28:	24040081 	li	a0,129
80001e2c:	3c028000 	lui	v0,0x8000
80001e30:	24421fdc 	addiu	v0,v0,8156
80001e34:	0040f809 	jalr	v0
80001e38:	00000000 	nop
80001e3c:	afa20010 	sw	v0,16(sp)
    result=s6b0724_write_command(reference_volt_register);  //reference voltage register
80001e40:	2404003f 	li	a0,63
80001e44:	3c028000 	lui	v0,0x8000
80001e48:	24421fdc 	addiu	v0,v0,8156
80001e4c:	0040f809 	jalr	v0
80001e50:	00000000 	nop
80001e54:	afa20010 	sw	v0,16(sp)
    result=s6b0724_write_command(initial_line);             //begining line
80001e58:	24040040 	li	a0,64
80001e5c:	3c028000 	lui	v0,0x8000
80001e60:	24421fdc 	addiu	v0,v0,8156
80001e64:	0040f809 	jalr	v0
80001e68:	00000000 	nop
80001e6c:	afa20010 	sw	v0,16(sp)
    result=s6b0724_write_command(set_modify_read);   //column addres atuo +1
80001e70:	240400e0 	li	a0,224
80001e74:	3c028000 	lui	v0,0x8000
80001e78:	24421fdc 	addiu	v0,v0,8156
80001e7c:	0040f809 	jalr	v0
80001e80:	00000000 	nop
80001e84:	afa20010 	sw	v0,16(sp)
    result=s6b0724_write_command(display_on);
80001e88:	240400af 	li	a0,175
80001e8c:	3c028000 	lui	v0,0x8000
80001e90:	24421fdc 	addiu	v0,v0,8156
80001e94:	0040f809 	jalr	v0
80001e98:	00000000 	nop
80001e9c:	afa20010 	sw	v0,16(sp)
    display_hz(0,0,&xin[0]);
80001ea0:	00002021 	move	a0,zero
80001ea4:	00002821 	move	a1,zero
80001ea8:	3c028000 	lui	v0,0x8000
80001eac:	24462278 	addiu	a2,v0,8824
80001eb0:	3c028000 	lui	v0,0x8000
80001eb4:	244220ec 	addiu	v0,v0,8428
80001eb8:	0040f809 	jalr	v0
80001ebc:	00000000 	nop
    while(1);
80001ec0:	1000ffff 	b	80001ec0 <_sp+0x300>
80001ec4:	00000000 	nop

80001ec8 <s6b0724_write_data>:
    return 0;
}

static int s6b0724_write_data( unsigned char data )
{    
80001ec8:	27bdffc8 	addiu	sp,sp,-56
80001ecc:	afbf0030 	sw	ra,48(sp)
80001ed0:	00801021 	move	v0,a0
80001ed4:	a3a20038 	sb	v0,56(sp)
__hal_defunc2(hal_gpio_ioctl, HAL_GPIO_CONTROL, control, int *, data);
__hal_defunc3(hal_gpio_attach, int, gpio, int, event, hal_gpio_handler_t, handler);
__hal_defunc1(hal_gpio_detach, int, gpio);
__hal_defunc1(hal_gpio_read, unsigned int *, data);
__hal_defunc1(hal_gpio_write, unsigned int, data);
80001ed8:	24020002 	li	v0,2
80001edc:	afa20018 	sw	v0,24(sp)
80001ee0:	3c028001 	lui	v0,0x8001
80001ee4:	3442f4b4 	ori	v0,v0,0xf4b4
80001ee8:	8c420000 	lw	v0,0(v0)
80001eec:	8fa40018 	lw	a0,24(sp)
80001ef0:	0040f809 	jalr	v0
80001ef4:	00000000 	nop
80001ef8:	afa2001c 	sw	v0,28(sp)
80001efc:	8fa2001c 	lw	v0,28(sp)
80001f00:	afa20010 	sw	v0,16(sp)
__hal_defunc1(hal_display_set_config, HAL_DISPLAY_CONFIG *, params);
__hal_defunc1(hal_display_get_status, int *, status);
__hal_defunc1(hal_display_write, char, data);
__hal_defunc1(hal_display_read, char *, data);
__hal_defunc2(hal_display_ioctl, int, cmd, void *, data);
80001f04:	24020001 	li	v0,1
80001f08:	afa2001c 	sw	v0,28(sp)
80001f0c:	afa00018 	sw	zero,24(sp)
80001f10:	3c028001 	lui	v0,0x8001
80001f14:	3442f414 	ori	v0,v0,0xf414
80001f18:	8c420000 	lw	v0,0(v0)
80001f1c:	8fa4001c 	lw	a0,28(sp)
80001f20:	8fa50018 	lw	a1,24(sp)
80001f24:	0040f809 	jalr	v0
80001f28:	00000000 	nop
80001f2c:	afa20020 	sw	v0,32(sp)
80001f30:	afa0001c 	sw	zero,28(sp)
80001f34:	24020001 	li	v0,1
80001f38:	afa20018 	sw	v0,24(sp)
80001f3c:	3c028001 	lui	v0,0x8001
80001f40:	3442f414 	ori	v0,v0,0xf414
80001f44:	8c420000 	lw	v0,0(v0)
80001f48:	8fa4001c 	lw	a0,28(sp)
80001f4c:	8fa50018 	lw	a1,24(sp)
80001f50:	0040f809 	jalr	v0
80001f54:	00000000 	nop
80001f58:	afa20024 	sw	v0,36(sp)
80001f5c:	93a20038 	lbu	v0,56(sp)
80001f60:	a3a20028 	sb	v0,40(sp)
80001f64:	3c028001 	lui	v0,0x8001
80001f68:	3442f40c 	ori	v0,v0,0xf40c
80001f6c:	8c430000 	lw	v1,0(v0)
80001f70:	93a20028 	lbu	v0,40(sp)
80001f74:	00402021 	move	a0,v0
80001f78:	0060f809 	jalr	v1
80001f7c:	00000000 	nop
80001f80:	afa2001c 	sw	v0,28(sp)
80001f84:	8fa2001c 	lw	v0,28(sp)
80001f88:	afa20010 	sw	v0,16(sp)
80001f8c:	27a20014 	addiu	v0,sp,20
80001f90:	afa2001c 	sw	v0,28(sp)
80001f94:	3c028001 	lui	v0,0x8001
80001f98:	3442f404 	ori	v0,v0,0xf404
80001f9c:	8c420000 	lw	v0,0(v0)
80001fa0:	8fa4001c 	lw	a0,28(sp)
80001fa4:	0040f809 	jalr	v0
80001fa8:	00000000 	nop
80001fac:	afa20018 	sw	v0,24(sp)
    int result;
    int status;        
    result=hal_gpio_write(0x02);                       //cs=0
    hal_display_ioctl(HAL_DISPLAY_IOCTL_SET_RW, 0);    //rw=0,write
    hal_display_ioctl(HAL_DISPLAY_IOCTL_SET_CD, (void *)1);    //rs=1,data     
    result = hal_display_write(data);     
    do 
    {
        hal_display_get_status(&status);
        
    } while( (status & HAL_DISPLAY_STATUS_TX_DONE) == 0 );  
80001fb0:	8fa20014 	lw	v0,20(sp)
80001fb4:	30420001 	andi	v0,v0,0x1
80001fb8:	14400003 	bnez	v0,80001fc8 <s6b0724_write_data+0x100>
80001fbc:	00000000 	nop
80001fc0:	1000fff2 	b	80001f8c <s6b0724_write_data+0xc4>
80001fc4:	00000000 	nop
    //result=hal_gpio_write(0x05);                       //cs=1   
    return result; 
80001fc8:	8fa20010 	lw	v0,16(sp)
}
80001fcc:	8fbf0030 	lw	ra,48(sp)
80001fd0:	27bd0038 	addiu	sp,sp,56
80001fd4:	03e00008 	jr	ra
80001fd8:	00000000 	nop

80001fdc <s6b0724_write_command>:

static int s6b0724_write_command( unsigned char cmd )
{
80001fdc:	27bdffc8 	addiu	sp,sp,-56
80001fe0:	afbf0030 	sw	ra,48(sp)
80001fe4:	00801021 	move	v0,a0
80001fe8:	a3a20038 	sb	v0,56(sp)
__hal_defunc2(hal_gpio_ioctl, HAL_GPIO_CONTROL, control, int *, data);
__hal_defunc3(hal_gpio_attach, int, gpio, int, event, hal_gpio_handler_t, handler);
__hal_defunc1(hal_gpio_detach, int, gpio);
__hal_defunc1(hal_gpio_read, unsigned int *, data);
__hal_defunc1(hal_gpio_write, unsigned int, data);
80001fec:	24020002 	li	v0,2
80001ff0:	afa20018 	sw	v0,24(sp)
80001ff4:	3c028001 	lui	v0,0x8001
80001ff8:	3442f4b4 	ori	v0,v0,0xf4b4
80001ffc:	8c420000 	lw	v0,0(v0)
80002000:	8fa40018 	lw	a0,24(sp)
80002004:	0040f809 	jalr	v0
80002008:	00000000 	nop
8000200c:	afa2001c 	sw	v0,28(sp)
80002010:	8fa2001c 	lw	v0,28(sp)
80002014:	afa20010 	sw	v0,16(sp)
__hal_defunc1(hal_display_set_config, HAL_DISPLAY_CONFIG *, params);
__hal_defunc1(hal_display_get_status, int *, status);
__hal_defunc1(hal_display_write, char, data);
__hal_defunc1(hal_display_read, char *, data);
__hal_defunc2(hal_display_ioctl, int, cmd, void *, data);
80002018:	24020001 	li	v0,1
8000201c:	afa2001c 	sw	v0,28(sp)
80002020:	afa00018 	sw	zero,24(sp)
80002024:	3c028001 	lui	v0,0x8001
80002028:	3442f414 	ori	v0,v0,0xf414
8000202c:	8c420000 	lw	v0,0(v0)
80002030:	8fa4001c 	lw	a0,28(sp)
80002034:	8fa50018 	lw	a1,24(sp)
80002038:	0040f809 	jalr	v0
8000203c:	00000000 	nop
80002040:	afa20020 	sw	v0,32(sp)
80002044:	afa0001c 	sw	zero,28(sp)
80002048:	afa00018 	sw	zero,24(sp)
8000204c:	3c028001 	lui	v0,0x8001
80002050:	3442f414 	ori	v0,v0,0xf414
80002054:	8c420000 	lw	v0,0(v0)
80002058:	8fa4001c 	lw	a0,28(sp)
8000205c:	8fa50018 	lw	a1,24(sp)
80002060:	0040f809 	jalr	v0
80002064:	00000000 	nop
80002068:	afa20024 	sw	v0,36(sp)
8000206c:	93a20038 	lbu	v0,56(sp)
80002070:	a3a20028 	sb	v0,40(sp)
80002074:	3c028001 	lui	v0,0x8001
80002078:	3442f40c 	ori	v0,v0,0xf40c
8000207c:	8c430000 	lw	v1,0(v0)
80002080:	93a20028 	lbu	v0,40(sp)
80002084:	00402021 	move	a0,v0
80002088:	0060f809 	jalr	v1
8000208c:	00000000 	nop
80002090:	afa2001c 	sw	v0,28(sp)
80002094:	8fa2001c 	lw	v0,28(sp)
80002098:	afa20010 	sw	v0,16(sp)
8000209c:	27a20014 	addiu	v0,sp,20
800020a0:	afa2001c 	sw	v0,28(sp)
800020a4:	3c028001 	lui	v0,0x8001
800020a8:	3442f404 	ori	v0,v0,0xf404
800020ac:	8c420000 	lw	v0,0(v0)
800020b0:	8fa4001c 	lw	a0,28(sp)
800020b4:	0040f809 	jalr	v0
800020b8:	00000000 	nop
800020bc:	afa20018 	sw	v0,24(sp)
    int result;
    int status;
    result=hal_gpio_write(0x02);                       //cs=0
    hal_display_ioctl(HAL_DISPLAY_IOCTL_SET_RW, 0);    //rw=0,write
    hal_display_ioctl(HAL_DISPLAY_IOCTL_SET_CD, 0);    //rs=0,command            
    result = hal_display_write(cmd);
    do 
    {
        hal_display_get_status(&status);
        
    } while( (status & HAL_DISPLAY_STATUS_TX_DONE) == 0 ); 
800020c0:	8fa20014 	lw	v0,20(sp)
800020c4:	30420001 	andi	v0,v0,0x1
800020c8:	14400003 	bnez	v0,800020d8 <s6b0724_write_command+0xfc>
800020cc:	00000000 	nop
800020d0:	1000fff2 	b	8000209c <s6b0724_write_command+0xc0>
800020d4:	00000000 	nop
    //result=hal_gpio_write(0x05);                       //cs=1
    return result;   
800020d8:	8fa20010 	lw	v0,16(sp)
}
800020dc:	8fbf0030 	lw	ra,48(sp)
800020e0:	27bd0038 	addiu	sp,sp,56
800020e4:	03e00008 	jr	ra
800020e8:	00000000 	nop

800020ec <display_hz>:

void display_hz(unsigned char x_adr,unsigned char y_adr,unsigned char *hz_adr)
{  
800020ec:	27bdffd8 	addiu	sp,sp,-40
800020f0:	afbf0020 	sw	ra,32(sp)
800020f4:	00801021 	move	v0,a0
800020f8:	00a01821 	move	v1,a1
800020fc:	afa60030 	sw	a2,48(sp)
80002100:	a3a20028 	sb	v0,40(sp)
80002104:	a3a3002c 	sb	v1,44(sp)
  unsigned char i,j,column_msb,column_lsb,page_adr;
  int result;
  page_adr=((x_adr*2)+0xb0);
80002108:	93a20028 	lbu	v0,40(sp)
8000210c:	00021040 	sll	v0,v0,0x1
80002110:	2403ffb0 	li	v1,-80
80002114:	00431021 	addu	v0,v0,v1
80002118:	a3a20014 	sb	v0,20(sp)
  column_msb=y_adr>>4;
8000211c:	93a2002c 	lbu	v0,44(sp)
80002120:	00021102 	srl	v0,v0,0x4
80002124:	a3a20012 	sb	v0,18(sp)
  column_msb=column_msb|0xf0;
80002128:	93a30012 	lbu	v1,18(sp)
8000212c:	2402fff0 	li	v0,-16
80002130:	00621025 	or	v0,v1,v0
80002134:	a3a20012 	sb	v0,18(sp)
  column_msb=column_msb&0x1f;
80002138:	93a20012 	lbu	v0,18(sp)
8000213c:	3042001f 	andi	v0,v0,0x1f
80002140:	a3a20012 	sb	v0,18(sp)
  column_lsb=y_adr&0x0f;
80002144:	93a2002c 	lbu	v0,44(sp)
80002148:	3042000f 	andi	v0,v0,0xf
8000214c:	a3a20013 	sb	v0,19(sp)
  result=s6b0724_write_command(column_msb); 
80002150:	93a20012 	lbu	v0,18(sp)
80002154:	00402021 	move	a0,v0
80002158:	3c028000 	lui	v0,0x8000
8000215c:	24421fdc 	addiu	v0,v0,8156
80002160:	0040f809 	jalr	v0
80002164:	00000000 	nop
80002168:	afa20018 	sw	v0,24(sp)
  result=s6b0724_write_command(column_lsb); 
8000216c:	93a20013 	lbu	v0,19(sp)
80002170:	00402021 	move	a0,v0
80002174:	3c028000 	lui	v0,0x8000
80002178:	24421fdc 	addiu	v0,v0,8156
8000217c:	0040f809 	jalr	v0
80002180:	00000000 	nop
80002184:	afa20018 	sw	v0,24(sp)
  result=s6b0724_write_command(page_adr); 
80002188:	93a20014 	lbu	v0,20(sp)
8000218c:	00402021 	move	a0,v0