📄 display_debug.map
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Memory ConfigurationName Origin Length Attributesram 0x0000000080000000 0x000000000001db00 xrwflash 0x0000000081000000 0x000000000003f000 xrsdram 0x0000000020000000 0x0000000002000000 xrwflash0 0x0000000030000000 0x0000000000400000 xrwflash1 0x0000000040000000 0x0000000002000000 xrwsram 0x0000000050000000 0x0000000000200000 xrw*default* 0x0000000000000000 0xffffffffffffffffLinker script and memory map 0x000000008001db00 __librom_sp = 0x8001db00.com.vect.e 0x0000000080000000 0xc 0x0000000080000000 __com_rom_start = . 0x0000000080000000 __com_ram_start = . 0x0000000080000000 __com_ram_end = . *(.except_vector) .except_vector 0x0000000080000000 0xc ../../lib/crt0.o 0x0000000080000000 hal_exception_handler.com.vect.i 0x0000000080000180 0x584 *(.other_vector) .other_vector 0x0000000080000180 0x584 ../../lib/crt0.o 0x00000000800002ac __default_interrupt_vsr 0x0000000080000494 hal_default_isr 0x00000000800001a4 __default_exception_vsr 0x0000000080000180 other_vector 0x00000000800004a0 __nmi_entry 0x0000000080000684 hal_vsr_table *(.vsr_table) *(.text.ram).com.vect.r 0x0000000080000704 0x4bc *(.reset_vector) .reset_vector 0x0000000080000704 0x3fc ../../lib/crt0.o 0x0000000080000af0 __warm_start 0x0000000080000704 reset_vector 0x000000008000080c _start *(.rom_vectors) .rom_vectors 0x0000000080000b00 0xc0 ../../lib/crt0.o 0x0000000080000b70 __romcopy 0x0000000080000b00 __zero_bss 0x0000000080000b98 __usip_init *(.text.rom) 0x00000000a0000bc0 __com_bss_start = (ALIGN (0x20) | 0x20000000).com.bss 0x00000000a0000bc0 0x0 *(.bss.usb) 0x00000000a0000bc0 __com_bss_end = ALIGN (0x20).fake.bss 0x0000000080000bc0 0x0 0x0000000080000bc0 . = ALIGN (0x20) 0x0000000080000bc0 . = (. + SIZEOF (.com.bss)) 0x0000000080000bc0 . = ALIGN (0x20).com.stack 0x0000000080000bc0 0x1000 0x0000000080000bc0 _sp_top = . 0x0000000080001bc0 . = (. + 0x1000) *fill* 0x0000000080000bc0 0x1000 00 0x0000000080001bc0 _sp = ..text 0x0000000080001bc0 0x6b8 *(.text) .text 0x0000000080001bc0 0x6b8 ././display1.o 0x00000000800020ec display_hz 0x0000000080001bc0 main *(.rodata*).data 0x0000000080002278 0x20 0x0000000080002278 __rom_start = . 0x0000000080002278 __ram_start = . 0x0000000080002278 __ram_end = . *(.data) .data 0x0000000080002278 0x20 ././display1.o 0x0000000080002278 xin *(SORT(.dev*)) 0x000000008000a290 _gp = (ALIGN (0x10) + 0x7ff0) *(.sdata) *(.lit4 .lit8).sbss 0x00000000800022a0 0x0 0x00000000800022a0 __bss_start = . *(.sbss .scommon) *(.bss COMMON) 0x00000000800022a0 . = ALIGN (0x20) 0x00000000800022a0 __bss_end = ..rel.dynSTART GROUPLOAD ././display1.oLOAD ../../lib/crt0.oLOAD ../../lib/libio/libio.aLOAD ../../lib/libc/libc.aEND GROUPOUTPUT(./display_debug.elf elf32-tradlittlemips).reginfo 0x0000000000000000 0x18 .reginfo 0x0000000000000000 0x18 ././display1.o.pdr 0x0000000000000000 0x200 .pdr 0x0000000000000000 0x80 ././display1.o .pdr 0x0000000000000080 0x180 ../../lib/crt0.o.mdebug.abi32 0x0000000000000000 0x0.debug_abbrev 0x0000000000000000 0x18f .debug_abbrev 0x0000000000000000 0x18f ././display1.o.debug_info 0x0000000000000000 0x8d6 .debug_info 0x0000000000000000 0x8d6 ././display1.o.debug_line 0x0000000000000000 0x134 .debug_line 0x0000000000000000 0x134 ././display1.o.debug_frame 0x0000000000000000 0x70 .debug_frame 0x0000000000000000 0x70 ././display1.o.debug_pubnames 0x0000000000000000 0x32 .debug_pubnames 0x0000000000000000 0x32 ././display1.o.debug_aranges 0x0000000000000000 0x20 .debug_aranges 0x0000000000000000 0x20 ././display1.o.debug_str 0x0000000000000000 0x4a .debug_str 0x0000000000000000 0x4a ././display1.o.comment 0x0000000000000000 0x2b .comment 0x0000000000000000 0x2b ././display1.o
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