dl.vhd

ad取样

--数码管显示模块
--note:clk不能太高频率，否则可能出错，要求分频到400hz左右
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all; 
use ieee.std_logic_unsigned.all;
entity dl is
port(
	clk : in std_logic;
--	rst : in std_logic;
	cat : out std_logic_vector(5 downto 0);  --6个数码管
	segout : out std_logic_vector(6 downto 0);  --7段数码管
	datain6 : in std_logic_vector(3 downto 0);  --待显示的最高位
	datain5 : in std_logic_vector(3 downto 0);
	datain4 : in std_logic_vector(3 downto 0);
	datain3 : in std_logic_vector(3 downto 0);
	datain2 : in std_logic_vector(3 downto 0);
	datain1 : in std_logic_vector(3 downto 0)
	);
end dl;

architecture aa of dl is
signal t_cat : std_logic_vector(5 downto 0);  --6个数码管
signal t_segout : std_logic_vector(6 downto 0);  --7段数码管
signal seg: std_logic_vector(3 downto 0);
--signal q: integer range 0 to 499999;   --分频50mhz到400hz
signal q1: integer range 0 to 62500;		--分频50mhz到400hz
signal q2: integer range 0 to 199;			--分频50mhz到400hz
signal clk400: std_logic:='0';-- :='0';
signal clk_mid: std_logic:='0';
begin

--分频20mhz到400hz
p1:process(clk)
begin
if (clk'event and clk='1') then
	if q1 = 62500 then
		q1 <= 0;
		clk_mid<=not clk_mid;
	else
		q1<=q1+1;
		clk_mid<=clk_mid;
	end if;
end if;
end process;

p2:process(clk_mid)
begin
if (clk_mid'event and clk_mid='1') then
	if q2 = 199 then
		q2 <= 0;
		clk400<=not clk400;
	else
		q2<=q2+1;
		clk400<=clk400;
	end if;
end if;
end process;

process(clk400)
begin
if (clk400'event and clk400='1') then
	case t_cat is
	when "011111" =>t_cat<="101111";seg<=datain6;
	when "101111" =>t_cat<="110111";seg<=datain5;
	when "110111" =>t_cat<="111011";seg<=datain4;
	when "111011" =>t_cat<="111101";seg<=datain3;
	when "111101" =>t_cat<="111110";seg<=datain2;
	when others   =>t_cat<="011111";seg<=datain1;
	end case;
	
	case seg is
	   	when "0000"=>t_segout<="0111111";--gfedcba
   		when "0001"=>t_segout<="0000110";
   		when "0010"=>t_segout<="1011011";
   		when "0011"=>t_segout<="1001111";
   		when "0100"=>t_segout<="1100110";
   		when "0101"=>t_segout<="1101101";
  		when "0110"=>t_segout<="1111101";
   		when "0111"=>t_segout<="0000111";
   		when "1000"=>t_segout<="1111111";
   		when "1001"=>t_segout<="1101111";
   		when others=>t_segout<="0000000";
	end case;
end if;
end process;

cat<=t_cat;
segout<=t_segout;
end;