freq.vhd

频率计

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity freq is
port(fsin:in std_logic;--被测信号
      clk:in std_logic;--基准时间，1Hz
      reset : in std_logic;
   show:out std_logic_vector(6 downto 0);--数码管段码输出
   row:out std_logic_vector(3 downto 0));--数码管选择信号
end freq;
architecture one of freq is
signal test_en:std_logic;
signal clear:std_logic;--复位信号
signal data:std_logic_vector(15 downto 0);--bcd
signal data_in:std_logic_vector(3 downto 0);--单个数码管显示
signal row_in:std_logic_vector(3 downto 0);--数码管的选择
begin
--分频，得到0.5Hz信号test_en
process(clk)
begin
if clk'event and clk='1' then
test_en<=not test_en;
end if;
end process;
clear<=not clk and not test_en;--定义clear信号

process(fsin)
begin
if reset= '1' then
row_in <= "0001";
elsif fsin'event and fsin='1' then
if row_in="0001" then row_in<="0010";
elsif row_in="0010" then row_in<="0100";
elsif row_in="0100" then row_in<="1000";
elsif row_in="1000" then row_in<="0001";
end if;
end if;
end process;
--在1秒钟时间内对被测脉冲信号计数
process(fsin,test_en)
begin
if clear='1' then data<="0000000000000000";
          elsif fsin'event and fsin='1' then 
if test_en='1' then
if data(15 downto 0)="1001100110011001" then data<=data+"0110011001100111";
        --9999->0000
elsif data(11 downto 0)="100110011001" then data<=data+"011001100111";
                            --999->1000
elsif data(7 downto 0)="10011001" then data<=data+"01100111";
                            --99->100
elsif data(3 downto 0)="1001" then data<=data+"0111";
                            --9->10
else data<=data+'1';
end if;
end if;
end if;
end process;
--根据所选数码管显示数据
process(row_in)
begin
row(3 downto 0)<=row_in(3 downto 0);
case row_in is
when "0001"=>data_in<=data(3 downto 0);
when "0010"=>data_in<=data(7 downto 4);
when "0100"=>data_in<=data(11 downto 8);
when "1000"=>data_in<=data(15 downto 12);
when others=>data_in<="0000";
end case;
end process;
--根据欲显示的数据配置数码管
process(data_in)
begin
case data_in is
when "0000"=>show<="0111111";
when "0001"=>show<="0000110";
when "0010"=>show<="1011011";
when "0011"=>show<="1001111";
when "0100"=>show<="1100110";
when "0101"=>show<="1101101";
when "0110"=>show<="1111101";
when "0111"=>show<="0000111";
when "1000"=>show<="1111111";
when "1001"=>show<="1101111";
when others=>show<="1000110";
end case;
end process;
end one;