lib_at91sam7x256.h

一个开源的Modbus协议栈

//* ----------------------------------------------------------------------------
//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
//* ----------------------------------------------------------------------------
//* DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
//* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
//* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
//* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
//* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
//* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
//* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
//* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
//* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
//* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//* ----------------------------------------------------------------------------
//* File Name           : lib_AT91SAM7X256.h
//* Object              : AT91SAM7X256 inlined functions
//* Generated           : AT91 SW Application Group  01/16/2006 (16:36:21)
//*
//* CVS Reference       : /lib_MC_SAM7X.h/1.1/Thu Mar 25 15:19:14 2004//
//* CVS Reference       : /lib_pdc.h/1.2/Tue Jul  2 13:29:40 2002//
//* CVS Reference       : /lib_dbgu.h/1.1/Thu Aug 25 12:56:22 2005//
//* CVS Reference       : /lib_VREG_6085B.h/1.1/Tue Feb  1 16:20:47 2005//
//* CVS Reference       : /lib_ssc.h/1.4/Fri Jan 31 12:19:20 2003//
//* CVS Reference       : /lib_spi2.h/1.2/Tue Aug 23 15:37:28 2005//
//* CVS Reference       : /lib_PWM_SAM.h/1.3/Thu Jan 22 10:10:50 2004//
//* CVS Reference       : /lib_tc_1753b.h/1.1/Fri Jan 31 12:20:02 2003//
//* CVS Reference       : /lib_pitc_6079A.h/1.2/Tue Nov  9 14:43:56 2004//
//* CVS Reference       : /lib_adc.h/1.6/Fri Oct 17 09:12:38 2003//
//* CVS Reference       : /lib_pmc_SAM7X.h/1.5/Fri Nov  4 09:41:32 2005//
//* CVS Reference       : /lib_rstc_6098A.h/1.1/Wed Oct  6 10:39:20 2004//
//* CVS Reference       : /lib_rttc_6081A.h/1.1/Wed Oct  6 10:39:38 2004//
//* CVS Reference       : /lib_pio.h/1.3/Fri Jan 31 12:18:56 2003//
//* CVS Reference       : /lib_twi.h/1.3/Mon Jul 19 14:27:58 2004//
//* CVS Reference       : /lib_wdtc_6080A.h/1.1/Wed Oct  6 10:38:30 2004//
//* CVS Reference       : /lib_usart.h/1.5/Thu Nov 21 16:01:54 2002//
//* CVS Reference       : /lib_udp.h/1.5/Tue Aug 30 12:13:47 2005//
//* CVS Reference       : /lib_aic_6075b.h/1.2/Thu Jul  7 07:48:22 2005//
//* CVS Reference       : /lib_can_AT91.h/1.5/Tue Aug 23 15:37:07 2005//
//* ----------------------------------------------------------------------------

#ifndef lib_AT91SAM7X256_H
#define lib_AT91SAM7X256_H

#include "AT91SAM7X256.h"

/* *****************************************************************************
                SOFTWARE API FOR AIC
   ***************************************************************************** */
#define AT91C_AIC_BRANCH_OPCODE ((void (*) ()) 0xE51FFF20)      // ldr, pc, [pc, #-&F20]

//*----------------------------------------------------------------------------
//* \fn    AT91F_AIC_ConfigureIt
//* \brief Interrupt Handler Initialization
//*----------------------------------------------------------------------------
static __inline unsigned int
AT91F_AIC_ConfigureIt( AT91PS_AIC pAic, // \arg pointer to the AIC registers
                       unsigned int irq_id,     // \arg interrupt number to initialize
                       unsigned int priority,   // \arg priority to give to the interrupt
                       unsigned int src_type,   // \arg activation and sense of activation
                       void            ( *newHandler ) (  ) )   // \arg address of the interrupt handler
{
    unsigned int    oldHandler;
    unsigned int    mask;

    oldHandler = pAic->AIC_SVR[irq_id];

    mask = 0x1 << irq_id;
    //* Disable the interrupt on the interrupt controller
    pAic->AIC_IDCR = mask;
    //* Save the interrupt handler routine pointer and the interrupt priority
    pAic->AIC_SVR[irq_id] = ( unsigned int )newHandler;
    //* Store the Source Mode Register
    pAic->AIC_SMR[irq_id] = src_type | priority;
    //* Clear the interrupt on the interrupt controller
    pAic->AIC_ICCR = mask;

    return oldHandler;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_AIC_EnableIt
//* \brief Enable corresponding IT number
//*----------------------------------------------------------------------------
static __inline void
AT91F_AIC_EnableIt( AT91PS_AIC pAic,    // \arg pointer to the AIC registers
                    unsigned int irq_id )       // \arg interrupt number to initialize
{
    //* Enable the interrupt on the interrupt controller
    pAic->AIC_IECR = 0x1 << irq_id;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_AIC_DisableIt
//* \brief Disable corresponding IT number
//*----------------------------------------------------------------------------
static __inline void
AT91F_AIC_DisableIt( AT91PS_AIC pAic,   // \arg pointer to the AIC registers
                     unsigned int irq_id )      // \arg interrupt number to initialize
{
    unsigned int    mask = 0x1 << irq_id;

    //* Disable the interrupt on the interrupt controller
    pAic->AIC_IDCR = mask;
    //* Clear the interrupt on the Interrupt Controller ( if one is pending )
    pAic->AIC_ICCR = mask;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_AIC_ClearIt
//* \brief Clear corresponding IT number
//*----------------------------------------------------------------------------
static __inline void
AT91F_AIC_ClearIt( AT91PS_AIC pAic,     // \arg pointer to the AIC registers
                   unsigned int irq_id )        // \arg interrupt number to initialize
{
    //* Clear the interrupt on the Interrupt Controller ( if one is pending )
    pAic->AIC_ICCR = ( 0x1 << irq_id );
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_AIC_AcknowledgeIt
//* \brief Acknowledge corresponding IT number
//*----------------------------------------------------------------------------
static __inline void
AT91F_AIC_AcknowledgeIt( AT91PS_AIC pAic )      // \arg pointer to the AIC registers
{
    pAic->AIC_EOICR = pAic->AIC_EOICR;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_AIC_SetExceptionVector
//* \brief Configure vector handler
//*----------------------------------------------------------------------------
static __inline unsigned int
AT91F_AIC_SetExceptionVector( unsigned int *pVector,    // \arg pointer to the AIC registers
                              void            ( *Handler ) (  ) )       // \arg Interrupt Handler
{
    unsigned int    oldVector = *pVector;

    if( ( unsigned int )Handler == ( unsigned int )AT91C_AIC_BRANCH_OPCODE )
        *pVector = ( unsigned int )AT91C_AIC_BRANCH_OPCODE;
    else
        *pVector =
            ( ( ( ( ( unsigned int )Handler ) - ( ( unsigned int )pVector ) - 0x8 ) >> 2 ) & 0x00FFFFFF ) | 0xEA000000;

    return oldVector;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_AIC_Trig
//* \brief Trig an IT
//*----------------------------------------------------------------------------
static __inline void
AT91F_AIC_Trig( AT91PS_AIC pAic,        // \arg pointer to the AIC registers
                unsigned int irq_id )   // \arg interrupt number
{
    pAic->AIC_ISCR = ( 0x1 << irq_id );
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_AIC_IsActive
//* \brief Test if an IT is active
//*----------------------------------------------------------------------------
static __inline unsigned int
AT91F_AIC_IsActive( AT91PS_AIC pAic,    // \arg pointer to the AIC registers
                    unsigned int irq_id )       // \arg Interrupt Number
{
    return ( pAic->AIC_ISR & ( 0x1 << irq_id ) );
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_AIC_IsPending
//* \brief Test if an IT is pending
//*----------------------------------------------------------------------------
static __inline unsigned int
AT91F_AIC_IsPending( AT91PS_AIC pAic,   // \arg pointer to the AIC registers
                     unsigned int irq_id )      // \arg Interrupt Number
{
    return ( pAic->AIC_IPR & ( 0x1 << irq_id ) );
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_AIC_Open
//* \brief Set exception vectors and AIC registers to default values
//*----------------------------------------------------------------------------
static __inline void
AT91F_AIC_Open( AT91PS_AIC pAic,        // \arg pointer to the AIC registers
                void            ( *IrqHandler ) (  ),   // \arg Default IRQ vector exception
                void            ( *FiqHandler ) (  ),   // \arg Default FIQ vector exception
                void            ( *DefaultHandler ) (  ),       // \arg Default Handler set in ISR
                void            ( *SpuriousHandler ) (  ),      // \arg Default Spurious Handler
                unsigned int protectMode )      // \arg Debug Control Register
{
    int             i;

    // Disable all interrupts and set IVR to the default handler
    for( i = 0; i < 32; ++i )
    {
        AT91F_AIC_DisableIt( pAic, i );
        AT91F_AIC_ConfigureIt( pAic, i, AT91C_AIC_PRIOR_LOWEST, AT91C_AIC_SRCTYPE_HIGH_LEVEL, DefaultHandler );
    }

    // Set the IRQ exception vector
    AT91F_AIC_SetExceptionVector( ( unsigned int * )0x18, IrqHandler );
    // Set the Fast Interrupt exception vector
    AT91F_AIC_SetExceptionVector( ( unsigned int * )0x1C, FiqHandler );

    pAic->AIC_SPU = ( unsigned int )SpuriousHandler;
    pAic->AIC_DCR = protectMode;
}

/* *****************************************************************************
                SOFTWARE API FOR PDC
   ***************************************************************************** */
//*----------------------------------------------------------------------------
//* \fn    AT91F_PDC_SetNextRx
//* \brief Set the next receive transfer descriptor
//*----------------------------------------------------------------------------
static __inline void
AT91F_PDC_SetNextRx( AT91PS_PDC pPDC,   // \arg pointer to a PDC controller
                     char *address,     // \arg address to the next bloc to be received
                     unsigned int bytes )       // \arg number of bytes to be received
{
    pPDC->PDC_RNPR = ( unsigned int )address;
    pPDC->PDC_RNCR = bytes;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_PDC_SetNextTx
//* \brief Set the next transmit transfer descriptor
//*----------------------------------------------------------------------------
static __inline void
AT91F_PDC_SetNextTx( AT91PS_PDC pPDC,   // \arg pointer to a PDC controller
                     char *address,     // \arg address to the next bloc to be transmitted
                     unsigned int bytes )       // \arg number of bytes to be transmitted
{
    pPDC->PDC_TNPR = ( unsigned int )address;
    pPDC->PDC_TNCR = bytes;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_PDC_SetRx
//* \brief Set the receive transfer descriptor
//*----------------------------------------------------------------------------
static __inline void
AT91F_PDC_SetRx( AT91PS_PDC pPDC,       // \arg pointer to a PDC controller
                 char *address, // \arg address to the next bloc to be received
                 unsigned int bytes )   // \arg number of bytes to be received
{
    pPDC->PDC_RPR = ( unsigned int )address;
    pPDC->PDC_RCR = bytes;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_PDC_SetTx
//* \brief Set the transmit transfer descriptor
//*----------------------------------------------------------------------------
static __inline void
AT91F_PDC_SetTx( AT91PS_PDC pPDC,       // \arg pointer to a PDC controller
                 char *address, // \arg address to the next bloc to be transmitted
                 unsigned int bytes )   // \arg number of bytes to be transmitted
{
    pPDC->PDC_TPR = ( unsigned int )address;
    pPDC->PDC_TCR = bytes;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_PDC_EnableTx
//* \brief Enable transmit
//*----------------------------------------------------------------------------
static __inline void
AT91F_PDC_EnableTx( AT91PS_PDC pPDC )   // \arg pointer to a PDC controller
{
    pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_PDC_EnableRx
//* \brief Enable receive
//*----------------------------------------------------------------------------
static __inline void
AT91F_PDC_EnableRx( AT91PS_PDC pPDC )   // \arg pointer to a PDC controller
{
    pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_PDC_DisableTx
//* \brief Disable transmit
//*----------------------------------------------------------------------------
static __inline void
AT91F_PDC_DisableTx( AT91PS_PDC pPDC )  // \arg pointer to a PDC controller
{
    pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_PDC_DisableRx
//* \brief Disable receive
//*----------------------------------------------------------------------------
static __inline void
AT91F_PDC_DisableRx( AT91PS_PDC pPDC )  // \arg pointer to a PDC controller
{
    pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
}