📄 clock_top.rpt
字号:
-- Node name is '|seltime_dc:ic4|:346'
-- Equation name is '_LC2_B20', type is buried
_LC2_B20 = LCELL( _EQ046);
_EQ046 = _LC5_B17 & _LC8_B18
# _LC3_B19 & _LC7_B18;
-- Node name is '|seltime_dc:ic4|:353'
-- Equation name is '_LC3_B18', type is buried
!_LC3_B18 = _LC3_B18~NOT;
_LC3_B18~NOT = LCELL( _EQ047);
_EQ047 = _LC1_B20
# !_LC3_B20
# _LC4_B18;
-- Node name is '|seltime_dc:ic4|:363'
-- Equation name is '_LC2_B18', type is buried
!_LC2_B18 = _LC2_B18~NOT;
_LC2_B18~NOT = LCELL( _EQ048);
_EQ048 = _LC1_B20
# _LC3_B20
# _LC4_B18;
-- Node name is '|seltime_dc:ic4|:366'
-- Equation name is '_LC5_B20', type is buried
_LC5_B20 = LCELL( _EQ049);
_EQ049 = !_LC2_B18 & _LC2_B20 & !_LC3_B18
# _LC2_B18 & _LC4_B22;
-- Node name is '|seltime_dc:ic4|:378'
-- Equation name is '_LC6_B17', type is buried
!_LC6_B17 = _LC6_B17~NOT;
_LC6_B17~NOT = LCELL( _EQ050);
_EQ050 = !_LC5_B18 & !_LC8_B18
# !_LC5_B18 & !_LC8_B17
# !_LC8_B18 & !_LC8_B19
# !_LC8_B17 & !_LC8_B19;
-- Node name is '|seltime_dc:ic4|:385'
-- Equation name is '_LC1_B23', type is buried
!_LC1_B23 = _LC1_B23~NOT;
_LC1_B23~NOT = LCELL( _EQ051);
_EQ051 = !_LC3_B18
# !_LC2_B16;
-- Node name is '|seltime_dc:ic4|:386'
-- Equation name is '_LC2_B23', type is buried
!_LC2_B23 = _LC2_B23~NOT;
_LC2_B23~NOT = LCELL( _EQ052);
_EQ052 = !_LC6_B17 & !_LC7_B18
# !_LC4_B19 & !_LC6_B17
# !_LC4_B19 & _LC7_B18
# _LC3_B18;
-- Node name is '|seltime_dc:ic4|:387'
-- Equation name is '_LC8_B23', type is buried
!_LC8_B23 = _LC8_B23~NOT;
_LC8_B23~NOT = LCELL( _EQ053);
_EQ053 = !_LC1_B23 & !_LC2_B18 & !_LC2_B23
# !_LC1_B23 & !_LC2_B23 & !_LC3_B22
# _LC2_B18 & !_LC3_B22;
-- Node name is '|seltime_dc:ic4|:396'
-- Equation name is '_LC5_B22', type is buried
!_LC5_B22 = _LC5_B22~NOT;
_LC5_B22~NOT = LCELL( _EQ054);
_EQ054 = !_LC6_B18 & !_LC8_B18
# !_LC7_B2 & !_LC8_B18
# !_LC2_B17 & !_LC6_B18
# !_LC2_B17 & !_LC7_B2;
-- Node name is '|seltime_dc:ic4|:399'
-- Equation name is '_LC6_B22', type is buried
!_LC6_B22 = _LC6_B22~NOT;
_LC6_B22~NOT = LCELL( _EQ055);
_EQ055 = !_LC5_B18 & !_LC5_B22
# !_LC5_B22 & !_LC6_B19
# _LC5_B18 & !_LC6_B19;
-- Node name is '|seltime_dc:ic4|:402'
-- Equation name is '_LC7_B22', type is buried
!_LC7_B22 = _LC7_B22~NOT;
_LC7_B22~NOT = LCELL( _EQ056);
_EQ056 = !_LC6_B22 & !_LC7_B18
# !_LC1_B19 & !_LC6_B22
# !_LC1_B19 & _LC7_B18;
-- Node name is '|seltime_dc:ic4|:405'
-- Equation name is '_LC8_B22', type is buried
!_LC8_B22 = _LC8_B22~NOT;
_LC8_B22~NOT = LCELL( _EQ057);
_EQ057 = !_LC3_B18 & !_LC7_B22
# !_LC4_B16 & !_LC7_B22
# _LC3_B18 & !_LC4_B16;
-- Node name is '|seltime_dc:ic4|:408'
-- Equation name is '_LC1_B22', type is buried
!_LC1_B22 = _LC1_B22~NOT;
_LC1_B22~NOT = LCELL( _EQ058);
_EQ058 = !_LC2_B18 & !_LC8_B22
# !_LC2_B22 & !_LC8_B22
# _LC2_B18 & !_LC2_B22;
-- Node name is '|seltime_dc:ic4|:417'
-- Equation name is '_LC1_B18', type is buried
_LC1_B18 = LCELL( _EQ059);
_EQ059 = _LC1_B17 & _LC8_B18
# _LC2_B2 & _LC6_B18;
-- Node name is '|seltime_dc:ic4|:420'
-- Equation name is '_LC6_B20', type is buried
_LC6_B20 = LCELL( _EQ060);
_EQ060 = _LC1_B18 & !_LC5_B18
# _LC5_B18 & _LC5_B19;
-- Node name is '|seltime_dc:ic4|:423'
-- Equation name is '_LC7_B20', type is buried
_LC7_B20 = LCELL( _EQ061);
_EQ061 = _LC6_B20 & !_LC7_B18
# _LC2_B24 & _LC7_B18;
-- Node name is '|seltime_dc:ic4|:426'
-- Equation name is '_LC8_B20', type is buried
_LC8_B20 = LCELL( _EQ062);
_EQ062 = !_LC3_B18 & _LC7_B20
# _LC3_B16 & _LC3_B18;
-- Node name is '|seltime_dc:ic4|:429'
-- Equation name is '_LC4_B20', type is buried
_LC4_B20 = LCELL( _EQ063);
_EQ063 = !_LC2_B18 & _LC8_B20
# _LC1_B16 & _LC2_B18;
-- Node name is '|seltime_dc:ic4|:799'
-- Equation name is '_LC3_B23', type is buried
_LC3_B23 = LCELL( _EQ064);
_EQ064 = _LC1_B22 & !_LC5_B20
# _LC4_B20 & !_LC5_B20 & _LC8_B23
# !_LC1_B22 & _LC5_B20 & !_LC8_B23
# !_LC4_B20 & !_LC5_B20 & !_LC8_B23;
-- Node name is '|seltime_dc:ic4|:832'
-- Equation name is '_LC4_B15', type is buried
_LC4_B15 = LCELL( _EQ065);
_EQ065 = !_LC1_B22 & !_LC4_B20 & !_LC8_B23
# !_LC1_B22 & _LC5_B20 & !_LC8_B23
# !_LC1_B22 & !_LC4_B20 & !_LC5_B20
# !_LC4_B20 & !_LC5_B20 & !_LC8_B23
# _LC1_B22 & _LC4_B20 & !_LC5_B20;
-- Node name is '|seltime_dc:ic4|:865'
-- Equation name is '_LC5_B23', type is buried
_LC5_B23 = LCELL( _EQ066);
_EQ066 = _LC1_B22 & !_LC5_B20 & _LC8_B23
# _LC4_B20 & !_LC5_B20 & _LC8_B23
# !_LC1_B22 & !_LC4_B20 & !_LC5_B20
# !_LC1_B22 & _LC5_B20 & !_LC8_B23
# !_LC1_B22 & !_LC4_B20 & !_LC8_B23
# _LC1_B22 & _LC4_B20 & !_LC5_B20;
-- Node name is '|seltime_dc:ic4|:898'
-- Equation name is '_LC8_B15', type is buried
_LC8_B15 = LCELL( _EQ067);
_EQ067 = !_LC4_B20 & !_LC5_B20 & !_LC8_B23
# _LC1_B22 & !_LC5_B20 & !_LC8_B23
# _LC1_B22 & !_LC4_B20 & !_LC5_B20
# !_LC1_B22 & _LC4_B20 & !_LC5_B20 & _LC8_B23
# !_LC1_B22 & !_LC4_B20 & !_LC8_B23
# !_LC1_B22 & _LC5_B20 & !_LC8_B23;
-- Node name is '|seltime_dc:ic4|:931'
-- Equation name is '_LC1_B15', type is buried
_LC1_B15 = LCELL( _EQ068);
_EQ068 = _LC1_B22 & !_LC4_B20 & !_LC5_B20
# !_LC1_B22 & !_LC5_B20 & !_LC8_B23
# !_LC1_B22 & !_LC4_B20 & !_LC8_B23;
-- Node name is '|seltime_dc:ic4|:952'
-- Equation name is '_LC7_B15', type is buried
_LC7_B15 = LCELL( _EQ069);
_EQ069 = !_LC4_B20 & !_LC5_B20 & _LC8_B23
# !_LC1_B22 & !_LC5_B20 & _LC8_B23
# !_LC1_B22 & _LC5_B20 & !_LC8_B23;
-- Node name is '|seltime_dc:ic4|:964'
-- Equation name is '_LC3_B15', type is buried
_LC3_B15 = LCELL( _EQ070);
_EQ070 = !_LC2_B15 & _LC7_B15
# !_LC6_B15;
-- Node name is '|seltime_dc:ic4|~991~1'
-- Equation name is '_LC2_B15', type is buried
-- synthesized logic cell
_LC2_B15 = LCELL( _EQ071);
_EQ071 = _LC1_B22 & !_LC5_B20 & !_LC8_B23;
-- Node name is '|seltime_dc:ic4|~999~1'
-- Equation name is '_LC6_B15', type is buried
-- synthesized logic cell
_LC6_B15 = LCELL( _EQ072);
_EQ072 = _LC1_B22
# _LC8_B23
# _LC5_B20;
-- Node name is '|seltime_dc:ic4|:999'
-- Equation name is '_LC5_B15', type is buried
_LC5_B15 = LCELL( _EQ073);
_EQ073 = _LC2_B15 & _LC6_B15
# _LC6_B15 & _LC7_B15;
Project Information f:\ted\051226edaex\timevhd\clock_top.rpt
** COMPILATION SETTINGS & TIMES **
Processing Menu Commands
------------------------
Design Doctor = off
Logic Synthesis:
Synthesis Type Used = Multi-Level
Default Synthesis Style = NORMAL
Logic option settings in 'NORMAL' style for 'FLEX10K' family
CARRY_CHAIN = ignore
CARRY_CHAIN_LENGTH = 32
CASCADE_CHAIN = ignore
CASCADE_CHAIN_LENGTH = 2
DECOMPOSE_GATES = on
DUPLICATE_LOGIC_EXTRACTION = on
MINIMIZATION = full
MULTI_LEVEL_FACTORING = on
NOT_GATE_PUSH_BACK = on
REDUCE_LOGIC = on
REFACTORIZATION = on
REGISTER_OPTIMIZATION = on
RESYNTHESIZE_NETWORK = on
SLOW_SLEW_RATE = off
SUBFACTOR_EXTRACTION = on
IGNORE_SOFT_BUFFERS = on
USE_LPM_FOR_AHDL_OPERATORS = off
Other logic synthesis settings:
Automatic Global Clock = on
Automatic Global Clear = on
Automatic Global Preset = on
Automatic Global Output Enable = on
Automatic Fast I/O = off
Automatic Register Packing = off
Automatic Open-Drain Pins = on
Automatic Implement in EAB = off
Optimize = 5
Default Timing Specifications: None
Cut All Bidir Feedback Timing Paths = on
Cut All Clear & Preset Timing Paths = on
Ignore Timing Assignments = off
Functional SNF Extractor = off
Linked SNF Extractor = off
Timing SNF Extractor = on
Optimize Timing SNF = off
Generate AHDL TDO File = off
Fitter Settings = NORMAL
Use Quartus Fitter = on
Smart Recompile = off
Total Recompile = off
Interfaces Menu Commands
------------------------
EDIF Netlist Writer = off
Verilog Netlist Writer = off
VHDL Netlist Writer = off
Compilation Times
-----------------
Compiler Netlist Extractor 00:00:05
Database Builder 00:00:00
Logic Synthesizer 00:00:02
Partitioner 00:00:02
Fitter 00:00:05
Timing SNF Extractor 00:00:01
Assembler 00:00:01
-------------------------- --------
Total Time 00:00:16
Memory Allocated
-----------------
Peak memory allocated during compilation = 13,735K
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -