system_top.pcf

Xilinx ISE9.x FPGACPLD设计指南 原书光盘上的源码 包含大量vhdl源码

//! **************************************************************************
// Written by: Map I.24 on Sun Aug 13 10:32:11 2006
//! **************************************************************************

SCHEMATIC START;
COMP "oVGA_BLUE<0>" LOCATE = SITE "P39" LEVEL 1;
COMP "oVGA_BLUE<1>" LOCATE = SITE "P37" LEVEL 1;
COMP "oVGA_BLUE<2>" LOCATE = SITE "P36" LEVEL 1;
COMP "oVSYNC" LOCATE = SITE "P35" LEVEL 1;
COMP "oVGA_RED<0>" LOCATE = SITE "P46" LEVEL 1;
COMP "oVGA_RED<1>" LOCATE = SITE "P45" LEVEL 1;
COMP "oVGA_RED<2>" LOCATE = SITE "P44" LEVEL 1;
COMP "iCLK" LOCATE = SITE "P76" LEVEL 1;
COMP "iPUSHBUTTON<0>" LOCATE = SITE "P180" LEVEL 1;
COMP "iPUSHBUTTON<1>" LOCATE = SITE "P181" LEVEL 1;
COMP "iPUSHBUTTON<2>" LOCATE = SITE "P189" LEVEL 1;
COMP "iPUSHBUTTON<3>" LOCATE = SITE "P80" LEVEL 1;
COMP "oVGA_GREEN<0>" LOCATE = SITE "P43" LEVEL 1;
COMP "oVGA_GREEN<1>" LOCATE = SITE "P42" LEVEL 1;
COMP "oVGA_GREEN<2>" LOCATE = SITE "P40" LEVEL 1;
COMP "oHCCP" LOCATE = SITE "P3" LEVEL 1;
COMP "oHCSI" LOCATE = SITE "P2" LEVEL 1;
COMP "iRST_N" LOCATE = SITE "P79" LEVEL 1;
COMP "oHSYNC" LOCATE = SITE "P34" LEVEL 1;
NET "iCLK_BUFGP/IBUFG" BEL "iCLK_BUFGP/BUFG.GCLKMUX" USELOCALCONNECT;
SCHEMATIC END;