📄 f2407regs.h
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;***********************************************************************
; File Name: f2407_c.h
;
; Description: F2407 huibian Languange Header file containing all peripheralRegister
; declarations as well as other useful definitions.
;
; Revision: 1.00
;
;**********************************************************************
;C2xx Core Registers
;~~~~~~~~~~~~~~~~~~~~
IMR .set 0004h ;Interrupt Mask Register
GREG .set 0005h ;Global memory allocation Register
IFR .set 0006h ;Interrupt Flag Register
PIVR .set 701Eh ;外设中断矢量寄存器
;System Module Registers
;~~~~~~~~~~~~~~~~~~~~~~~
SCSR1 .set 07018h ;System Module Control and Status Register 1
SCSR2 .set 07019h ;System Module Control and Status Register 2
;Watch-Dog(WD) / Real Time Int(RTI) / Phase Lock Loop(PLL) Registers
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
WDCNTR .set 07023h ;WD Counter Register
WDKEY .set 07025h ;WD Key Register
WDCR .set 07029h ;WD Control Register
;Analog-to-Digital Converter(ADC) registers
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
ADCTRL1 .set 070A0h ;ADC Control Register 1
ADCTRL2 .set 070A1h ;ADC Control Register 2
MAXCONV .set 070A2h
CHSELSEQ1 .set 070A3h
CHSELSEQ2 .set 070A4h
CHSELSEQ3 .set 070A5h
CHSELSEQ4 .set 070A6h
RESULT0 .set 070A8h
RESULT1 .set 070A9h
RESULT2 .set 070AAh
RESULT3 .set 070ABh
RESULT4 .set 070ACh
RESULT5 .set 070ADh
RESULT6 .set 070AEh
RESULT7 .set 070AFh
RESULT8 .set 070B0h
RESULT9 .set 070B1h
RESULT10 .set 070B2h
RESULT11 .set 070B3h
RESULT12 .set 070B4h
RESULT13 .set 070B5h
RESULT14 .set 070B6h
RESULT15 .set 070B7h
;Digital-to-Analog Converter(DAC) registers
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
DAC0 .set 8000h
DAC1 .set 8001h
DAC2 .set 8002h
DAC3 .set 8003h
DAC_UPDATA .set 8004h
;Serial Peripheral Interface (SPI) Registers
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SPICCR .set 07040h ;SPI Configuration Control Register
SPICTL .set 07041h ;SPI Operation Control Register
SPISTS .set 07042h ;SPI Status Register
SPIBRR .set 07044h ;SPI Baud Rate Register
SPIEMU .set 07046h ;SPI Emulation buffer Register
SPIBUF .set 07047h ;SPI Serial Input Buffer Register
SPIDAT .set 07049h ;SPI Serial Data Register
SPIPRI .set 0704Fh ;SPI Priority control Register
;Serial Communications Interface (SCI) Registers
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SCICCR .set 07050h ;SCI Communication Control Register
SCICTL1 .set 07051h ;SCI Control Register 1
SCIHBAUD .set 07052h ;SCI Baud Select Register, high bits
SCILBAUD .set 07053h ;SCI Baud Select Register, high bits
SCICTL2 .set 07054h ;SCI Control Register 2
SCIRXST .set 07055h ;SCI Receive Status Register
SCIRXEMU .set 07056h ;SCI Emulation data buffer Register
SCIRXBUF .set 07057h ;SCI Receiver data buffer Register
SCITXBUF .set 07059h ;SCI Transmit data buffer Register
SCIPRI .set 0705Fh ;SCI Priority Control Register
;CAN Controller Module Registers
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MDER .set 07100h ;Mailbox Direction/Enable Register
TCR .set 07101h ;Transmission Control Register
RCR .set 07102h ;Receive Control Register
MCR .set 07103h ;Master Control Register
BCR2 .set 07104h ;Bit Configuration Register 2
BCR1 .set 07105h ;Bit Configuration Register 1
ESR .set 07106h ;Error Status Register
GSR .set 07107h ;Global Status Register
CEC .set 07108h ;CAN Error Counter Registers
CAN_IFR .set 07109h ;Interrupt Flag Register
CAN_IMR .set 0710Ah ;Global Interrupt Mask Register
LAM0_H .set 0710Bh ;Local Acceptance Mask Mailbox 0 and 1
LAM0_L .set 0710Ch ;Local Acceptance Mask Mailbox 0 and 1
LAM1_H .set 0710Dh ;Local Acceptance Mask Mailbox 2 and 3
LAM1_L .set 0710Eh ;Local Acceptance Mask Mailbox 2 and 3
MSGID0L .set 07200h ;CAN Message ID For Mailbox 0 (lower 16 bits)
MSGID0H .set 07201h ;CAN Message ID For Mailbox 0 (upper 16 bits)
MSGCTRL0 .set 07202h ;CAN Message Control Field 0
MBX0A .set 07204h ;CAN 2 of 8 Bytes of Mailbox 0
MBX0B .set 07205h ;CAN 2 of 8 Bytes of Mailbox 0
MBX0C .set 07206h ;CAN 2 of 8 Bytes of Mailbox 0
MBX0D .set 07207h ;CAN 2 of 8 Bytes of Mailbox 0
MSGID1L .set 07208h ;CAN Message ID For Mailbox 1 (lower 16 bits)
MSGID1H .set 07209h ;CAN Message ID For Mailbox 1 (upper 16 bits)
MSGCTRL1 .set 0720Ah ;CAN Message Control Field 1
MBX1A .set 0720Ch ;CAN 2 of 8 Bytes of Mailbox 1
MBX1B .set 0720Dh ;CAN 2 of 8 Bytes of Mailbox 1
MBX1C .set 0720Eh ;CAN 2 of 8 Bytes of Mailbox 1
MBX1D .set 0720Fh ;CAN 2 of 8 Bytes of Mailbox 1
MSGID2L .set 07210h ;CAN Message ID For Mailbox 2 (lower 16 bits)
MSGID2H .set 07211h ;CAN Message ID For Mailbox 2 (upper 16 bits)
MSGCTRL2 .set 07212h ;CAN Message Control Field 2
MBX2A .set 07214h ;CAN 2 of 8 Bytes of Mailbox 2
MBX2B .set 07215h ;CAN 2 of 8 Bytes of Mailbox 2
MBX2C .set 07216h ;CAN 2 of 8 Bytes of Mailbox 2
MBX2D .set 07217h ;CAN 2 of 8 Bytes of Mailbox 2
MSGID3L .set 07218h ;CAN Message ID For Mailbox 3 (lower 16 bits)
MSGID3H .set 07219h ;CAN Message ID For Mailbox 3 (upper 16 bits)
MSGCTRL3 .set 0721Ah ;CAN Message Control Field 3
MBX3A .set 0721Ch ;CAN 2 of 8 Bytes of Mailbox 3
MBX3B .set 0721Dh ;CAN 2 of 8 Bytes of Mailbox 3
MBX3C .set 0721Eh ;CAN 2 of 8 Bytes of Mailbox 3
MBX3D .set 0721Fh ;CAN 2 of 8 Bytes of Mailbox 3
MSGID4L .set 07220h ;CAN Message ID For Mailbox 4 (lower 16 bits)
MSGID4H .set 07221h ;CAN Message ID For Mailbox 4 (upper 16 bits)
MSGCTRL4 .set 07222h ;CAN Message Control Field 4
MBX4A .set 07224h ;CAN 2 of 8 Bytes of Mailbox 4
MBX4B .set 07225h ;CAN 2 of 8 Bytes of Mailbox 4
MBX4C .set 07226h ;CAN 2 of 8 Bytes of Mailbox 4
MBX4D .set 07227h ;CAN 2 of 8 Bytes of Mailbox 4
MSGID5L .set 07228h ;CAN Message ID For Mailbox 5 (lower 16 bits)
MSGID5H .set 07229h ;CAN Message ID For Mailbox 5 (upper 16 bits)
MSGCTRL5 .set 0722Ah ;CAN Message Control Field 5
MBX5A .set 0722Ch ;CAN 2 of 8 Bytes of Mailbox 5
MBX5B .set 0722Dh ;CAN 2 of 8 Bytes of Mailbox 5
MBX5C .set 0722Eh ;CAN 2 of 8 Bytes of Mailbox 5
MBX5D .set 0722Fh ;CAN 2 of 8 Bytes of Mailbox 5
MDER .set 07100h ;Mailbox Direction/Enable Register
TCR .set 07101h ;Transmission Control Register
RCR .set 07102h ;Receive Control Register
MCR .set 07103h ;Master Control Register
BCR2 .set 07104h ;Bit Configuration Register 2
BCR1 .set 07105h ;Bit Configuration Register 1
ESR .set 07106h ;Error Status Register
GSR .set 07107h ;Global Status Register
CEC .set 07108h ;CAN Error Counter Registers
CAN_IFR .set 07109h ;Interrupt Flag Register
CAN_IMR .set 0710Ah ;Global Interrupt Mask Register
LAM0_H .set 0710Bh ;Local Acceptance Mask Mailbox 0 and 1
LAM0_L .set 0710Ch ;Local Acceptance Mask Mailbox 0 and 1
LAM1_H .set 0710Dh ;Local Acceptance Mask Mailbox 2 and 3
LAM1_L .set 0710Eh ;Local Acceptance Mask Mailbox 2 and 3
MSGID0L .set 07200h ;CAN Message ID for Mailbox 0 (lower 16 bits)
MSGID0H .set 07201h ;CAN Message ID for Mailbox 0 (upper 16 bits)
MSGCTRL0 .set 07202h ;CAN Message Control Field 0
MBX0A .set 07204h ;CAN 2 of 8 Bytes of Mailbox 0
MBX0B .set 07205h ;CAN 2 of 8 Bytes of Mailbox 0
MBX0C .set 07206h ;CAN 2 of 8 Bytes of Mailbox 0
MBX0D .set 07207h ;CAN 2 of 8 Bytes of Mailbox 0
MSGID1L .set 07208h ;CAN Message ID for Mailbox 1 (lower 16 bits)
MSGID1H .set 07209h ;CAN Message ID for Mailbox 1 (upper 16 bits)
MSGCTRL1 .set 0720Ah ;CAN Message Control Field 1
MBX1A .set 0720Ch ;CAN 2 of 8 Bytes of Mailbox 1
MBX1B .set 0720Dh ;CAN 2 of 8 Bytes of Mailbox 1
MBX1C .set 0720Eh ;CAN 2 of 8 Bytes of Mailbox 1
MBX1D .set 0720Fh ;CAN 2 of 8 Bytes of Mailbox 1
MSGID2L .set 07210h ;CAN Message ID for Mailbox 2 (lower 16 bits)
MSGID2H .set 07211h ;CAN Message ID for Mailbox 2 (upper 16 bits)
MSGCTRL2 .set 07212h ;CAN Message Control Field 2
MBX2A .set 07214h ;CAN 2 of 8 Bytes of Mailbox 2
MBX2B .set 07215h ;CAN 2 of 8 Bytes of Mailbox 2
MBX2C .set 07216h ;CAN 2 of 8 Bytes of Mailbox 2
MBX2D .set 07217h ;CAN 2 of 8 Bytes of Mailbox 2
MSGID3L .set 07218h ;CAN Message ID for Mailbox 3 (lower 16 bits)
MSGID3H .set 07219h ;CAN Message ID for Mailbox 3 (upper 16 bits)
MSGCTRL3 .set 0721Ah ;CAN Message Control Field 3
MBX3A .set 0721Ch ;CAN 2 of 8 Bytes of Mailbox 3
MBX3B .set 0721Dh ;CAN 2 of 8 Bytes of Mailbox 3
MBX3C .set 0721Eh ;CAN 2 of 8 Bytes of Mailbox 3
MBX3D .set 0721Fh ;CAN 2 of 8 Bytes of Mailbox 3
MSGID4L .set 07220h ;CAN Message ID for Mailbox 4 (lower 16 bits)
MSGID4H .set 07221h ;CAN Message ID for Mailbox 4 (upper 16 bits)
MSGCTRL4 .set 07222h ;CAN Message Control Field 4
MBX4A .set 07224h ;CAN 2 of 8 Bytes of Mailbox 4
MBX4B .set 07225h ;CAN 2 of 8 Bytes of Mailbox 4
MBX4C .set 07226h ;CAN 2 of 8 Bytes of Mailbox 4
MBX4D .set 07227h ;CAN 2 of 8 Bytes of Mailbox 4
MSGID5L .set 07228h ;CAN Message ID for Mailbox 5 (lower 16 bits)
MSGID5H .set 07229h ;CAN Message ID for Mailbox 5 (upper 16 bits)
MSGCTRL5 .set 0722Ah ;CAN Message Control Field 5
MBX5A .set 0722Ch ;CAN 2 of 8 Bytes of Mailbox 5
MBX5B .set 0722Dh ;CAN 2 of 8 Bytes of Mailbox 5
MBX5C .set 0722Eh ;CAN 2 of 8 Bytes of Mailbox 5
MBX5D .set 0722Fh ;CAN 2 of 8 Bytes of Mailbox 5
;External Interrupt Registers
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~
XINT1CR .set 07070h ;Interrupt 1 Control Register
XINT2CR .set 07071h ;Interrupt 2 Control Register
;Digital I/O
;~~~~~~~~~~~
MCRA .set 07090h ;Output Control Reg A
MCRB .set 07092h ;Output Control Reg B
MCRC .set 07094h ;Output Control Reg C
PADATDIR .set 07098h ;I/O port A Data & Direction reg.
PBDATDIR .set 0709Ah ;I/O port B Data & Direction reg.
PCDATDIR .set 0709Ch ;I/O port C Data & Direction reg.
PDDATDIR .set 0709Eh ;I/O port D Data & Direction reg.
PEDATDIR .set 07095h ;I/O port E Data & Direction reg.
PFDATDIR .set 07096h ;I/O port F Data & Direction reg.
;General Purpose Timer Registers - Event Manager (EV)
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
GPTCONA .set 7400h ;General Purpose Timer Control Register
T1CNT .set 7401h ;GP Timer 1 Counter Register
T1CMPR .set 7402h ;GP Timer 1 Compare Register
T1PR .set 7403h ;GP Timer 1 Period Register
T1CON .set 7404h ;GP Timer 1 Control Register
T2CNT .set 7405h ;GP Timer 2 Counter Register
T2CMPR .set 7406h ;GP Timer 2 Compare Register
T2PR .set 7407h ;GP Timer 2 Period Register
T2CON .set 7408h ;GP Timer 2 Control Register
;Full & Simple Compare Unit Registers - Event Manager (EV)
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
COMCONA .set 7411h ;Compare Control Register
ACTRA .set 7413h ;Full Compare Action Control Register
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