f2407regs.h

针对电机VVVF控制的汇编语言程序

DBTCONA		.set	7415h			;Dead-band Timer Control Register
CMPR1		.set	7417h			;Full Compare Unit 1 Compare Register
CMPR2		.set	7418h			;Full Compare Unit 2 Compare Register
CMPR3		.set	7419h			;Full Compare Unit 3 Compare Register

;Capture & QEP Registers - Event Manager (EV)
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
CAPCONA		.set	7420h			;Capture Control Register
CAPFIFOA	.set	7422h			;Capture FIFO Status Register
CAP1FIFO	.set	7423h			;Capture 1 Two-level deep FIFO Register
CAP2FIFO	.set	7424h			;Capture 2 Two-level deep FIFO Register
CAP3FIFO	.set	7425h			;Capture 3 Two-level deep FIFO Register

;Interrupt Registers - Event Manager (EV)
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 

EVAIMRA	.set	742Ch			;EV Interrupt Mask Register A
EVAIMRB	.set	742Dh			;EV Interrupt Mask Register B
EVAIMRC	.set	742Eh			;EV Interrupt Mask Register C
EVAIFRA	.set	742Fh			;EV Interrupt Flag Register A
EVAIFRB	.set	7430h			;EV Interrupt Flag Register B
EVAIFRC	.set	7431h			;EV Interrupt Flag Register C

;Flash Module Registers (mapped into Program space!!!!!!!!!!!!!!!)
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~


;Wait State Generator Registers (mapped into I/O space!!!!!!!!!!!!!)
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
WSGR		.set	0FFFFh		;Wait State Generator Register



;-----------------------------------------------------------------------
; Constant Definitions
;-----------------------------------------------------------------------

;Data Memory Boundary Addresses
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
B0_SADDR	.set	00200h		;Block B0 start address
B0_EADDR	.set	002FFh		;Block B0 end address
B1_SADDR	.set	00300h		;Block B1 start address
B1_EADDR	.set	003FFh		;Block B1 end address
B2_SADDR	.set	00060h		;Block B2 start address
B2_EADDR	.set	0007Fh		;Block B2 end address
XDATA_SADDR	.set	08000h		;External Data Space start address
XDATA_EADDR	.set  	0FFFFh		;External Data Space end address

;Bit codes For Test Bit instruction (BIT)
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
BIT15		.set	0000h		;Bit Code For 15
BIT14		.set	0001h		;Bit Code For 14
BIT13		.set	0002h		;Bit Code For 13
BIT12		.set	0003h		;Bit Code For 12
BIT11		.set	0004h		;Bit Code For 11
BIT10		.set	0005h		;Bit Code For 10
BIT9		.set	0006h		;Bit Code For 9
BIT8		.set	0007h		;Bit Code For 8
BIT7		.set	0008h		;Bit Code For 7
BIT6		.set	0009h		;Bit Code For 6
BIT5		.set	000Ah		;Bit Code For 5
BIT4		.set	000Bh		;Bit Code For 4
BIT3		.set	000Ch		;Bit Code For 3
BIT2		.set	000Dh		;Bit Code For 2
BIT1		.set	000Eh		;Bit Code For 1
BIT0		.set	000Fh		;Bit Code For 0

;Bit masks used by the SBIT0 & SBIT1 Macros
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
B15_MSK 	.set	8000h		;Bit Mask For 15
B14_MSK 	.set	4000h		;Bit Mask For 14
B13_MSK 	.set	2000h		;Bit Mask For 13
B12_MSK 	.set	1000h		;Bit Mask For 12
B11_MSK 	.set	0800h		;Bit Mask For 11
B10_MSK 	.set	0400h		;Bit Mask For 10
B9_MSK	    .set    0200h		;Bit Mask For 9
B8_MSK	    .set    0100h		;Bit Mask For 8
B7_MSK	    .set    0080h		;Bit Mask For 7
B6_MSK   	.set	0040h		;Bit Mask For 6
B5_MSK	    .set    0020h		;Bit Mask For 5
B4_MSK  	.set	0010h		;Bit Mask For 4
B3_MSK  	.set	0008h		;Bit Mask For 3
B2_MSK  	.set	0004h		;Bit Mask For 2
B1_MSK  	.set	0002h		;Bit Mask For 1
B0_MSK  	.set	0001h		;Bit Mask For 0 

;Data Page
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 
DP_B2       .set    0
DP_PF1      .set    224
DP_PF2      .set    225
DP_CAN      .set    00E2h
DP_CAN0     .set    00E4h


;-----------------------------------------------------------------------
; M A C R O - Definitions
;-----------------------------------------------------------------------

SBIT0		.macro	DMA, MASK		;Clear bit Macro
	     	LACC	DMA				
	    	AND	#(0FFFFh-MASK)		
		    SACL	DMA				
		   .endm

SBIT1		.macro	DMA, MASK		;Set bit Macro
	 	    LACC	DMA
		    OR	#(MASK)
		    SACL	DMA
		    .endm

KICK_DOG	.macro				    ;Watchdog reset macro
		    LDP	#00E0h			        ;DP-->7000h-707Fh
		    SPLK	#05555h, WDKEY		;WDCNTR is enabled to be reset by next AAh
		    SPLK	#0AAAAh, WDKEY		;WDCNTR is reset
	    	LDP	#0h			            ;DP-->0000h-007Fh
	    	.endm
               

;**********************************************************************
;some useful Macros with Digital I/O pins
;**********************************************************************/

START_PWM   .MACRO

		LDP	#0E8H
		LACL	COMCONA
		OR	#8200H
		SACL    COMCONA			;允许PWM输出
               
        SPLK #0999H  , ACTRA
                .ENDM 

STOP_PWM   .MACRO

		LDP	#0E8H
		LACL	COMCONA
		AND	#0111110111111111B
		SACL    COMCONA			;禁止PWM输出
               
                SPLK #0FFFH ,ACTRA 
               .ENDM
;/*TCLKIN/IOPB7管脚(接发光二极管D8,用于测试)*/

LED_D8_ON     .MACRO
               LDP #0E1H
               LACL MCRA
               AND #7FFFH
               SACL MCRA
               LACL PBDATDIR
               OR  #8080H
               SACL PBDATDIR
              .ENDM
              
LED_D8_OFF  .MACRO	
               LDP #0E1H
               LACL MCRA
               AND #7FFFH
               SACL MCRA
               LACL PBDATDIR
               AND  #7F7FH
               SACL PBDATDIR
              .ENDM
;/*SPICLK/IOPC4(接发光二极管D9,用于测试)*/
LED_D9_ON     .MACRO
               LDP #0E1H
               LACL MCRB
               AND #0FFEFH
               SACL MCRB
               LACL PCDATDIR
               OR  #1010H
               SACL PCDATDIR
              .ENDM
              
LED_D9_OFF  .MACRO	
               LDP #0E1H
               LACL MCRB
               AND #0FFEFH
               SACL MCRB
               LACL PCDATDIR
               AND  #0EFEFH
               SACL PCDATDIR
              .ENDM
;/*SPISTE/IOPC5(接发光二极管D10,用于测试)*/
LED_D10_ON     .MACRO
               LDP #0E1H
               LACL MCRB
               AND #0FFDFH
               SACL MCRB
               LACL PCDATDIR
               OR  #2020H
               SACL PCDATDIR
              .ENDM
              
LED_D10_OFF  .MACRO	
               LDP #0E1H
               LACL MCRB
               AND #0FFDFH
               SACL MCRB
               LACL PCDATDIR
               AND  #0DFDFH
               SACL PCDATDIR
              .ENDM
;/*PWM12/IOPE6管脚(接发光二极管D7,用于测试)*/

LED_D7_ON     .MACRO
               LDP #0E1H
               LACL MCRC
               AND #0FFBFH
               SACL MCRC
               LACL PEDATDIR
               OR  #4040H
               SACL PEDATDIR
              .ENDM
              
LED_D7_OFF  .MACRO	
               LDP #0E1H
               LACL MCRC
               AND #0FFBFH
               SACL MCRC
               LACL PEDATDIR
               AND  #0BFBFH
               SACL PEDATDIR
              .ENDM
;/*CAP6/IOPF1管脚(用于"Run/Stop控制"输入)*/

		
ENABLE_IOPF1_INPIN  .MACRO
               LDP #0E1H
               LACL MCRC
               AND #FDFFH
               SACL MCRC
               LACL  PFDATDIR
               AND   #FDFFH
               SACL PFDATDIR
               .ENDM