📄 kernelnetworkdriver_amdpcnetregisters.h
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//Refer to the file pcnethw.h of Reactos//this gives incredible details about the registers (which you cannot find in the AMD specifications)#define CONTROLLER_STATUS 0x0 //CSR0#define INIT_BLOCK_ADDRESS_LOW 0x1 //CSR1#define INIT_BLOCK_ADDRESS_HIGH 0x2 //CSR2#define INT_MASKS 0x3 //CSR3#define TEST_FEATURES_CONTROL 0x4 //CSR4#define EXTENDED_CONTROL 0x5 //CSR5#define RX_TX_DESCRIPTOR_TABLE_LENGTH 0x6 //CSR6#define LOGICAL_ADDRESS_FILTER_1_LOW 0x8 //CSR8#define LOGICAL_ADDRESS_FILTER_1_HIGH 0x9 //CSR9#define LOGICAL_ADDRESS_FILTER_2_LOW 0xa //CSR10#define LOGICAL_ADDRESS_FILTER_2_HIGH 0xb //CSR11#define PHYSICAL_ADDRESS_LOW 0xc //CSR12#define PHYSICAL_ADDRESS_MIDDLE 0xd //CSR13#define PHYSICAL_ADDRESS_HIGH 0xe //CSR14#define MODE 0xf //CSR15#define SOFTWARE_MODE 0x3a //CSR58#define LINK_STATUS 0x4 //BCR4#define BURST_CONTROL 0x12 //BCR18#define CSR0_INIT 0x1 #define CSR0_START 0x2 #define CSR0_STOP 0x4 #define CSR0_TRANSMIT_DEMAND 0x8 #define CSR0_TRANSMIT_ON 0x10 #define CSR0_RECEIVE_ON 0x20 #define CSR0_INTERRUPT_ENABLE 0x40 #define CSR0_INTERRUPT_OCCURED 0x80 #define CSR0_INIT_DONE 0x100 #define CSR0_TRANSMIT_INTERRUPT 0x200 #define CSR0_RECEIVE_INTERRUPT 0x400 #define CSR0_MEMORY_ERROR 0x800 #define CSR0_MISSED_FRAME 0x1000 #define CSR0_COLLISION_ERROR 0x2000 #define CSR0_BABBLE 0x4000 #define CSR0_ERROR 0x8000 #define CSR4_NO_TRANSMIT_INTERRUPT 0x0004#define CSR4_AUTO_PAD_TRANSMIT 0x0800#define CSR4_DISABLE_TX_POLLING 0x1000#define CSR4_DMAPLUS 0x4000 #define CSR15_DISABLE_RECEIVER 0x1#define CSR15_DISABLE_TRANSMITTER 0x2#define CSR15_LOOPBACK 0x4#define CSR15_FORCE_COLLISION 0x10#define CSR15_DISABLE_RETRY 0x20#define CSR15_INTERNAL_LOOPBACK 0x40#define CSR15_DISABLE_LINK_STATUS 0x1000#define CSR15_NO_RX_FOR_PHYSICAL_ADDRESS 0x2000#define CSR15_NO_RX_FOR_BROADCAST_ADDRESS 0x4000#define CSR15_PROMISCIOUS_MODE 0x8000#define CSR58_SOFTWARE_32BIT 0x100#define BCR4_LINK_STATUS 0x40#define BCR4_FULL_DUPLEX_STATUS 0x100 #define BCR18_BURST_READ_ENABLED 0x40#define BCR18_BURST_WRITE_ENABLED 0x20#define TD_END_OF_PACKET 0x100#define TD_START_OF_PACKET 0x200#define TD_NO_TX_SUCCESS_INTERRUPT 0x1000#define TD_OWNED_BY_NIC 0x8000
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