kernelbuspci.c

上一个上传的有问题,这个是好的。visopsys包括系统内核和GUI的全部SOURCE code ,还包括一些基本的docs文档。里面src子目录对应所有SOURCE code.对于想研究操作系统的朋

//This Code is without ANY license. You can do with it whatever you want, for example modify it, 
//license it under any style of license, incorporate it in your programs or anything else.
//There is absolutely no warranty on it, don't blame anybody if it is evil.
//You have the right to remove these lines. It would be nice if you gave me credits when you use this code, 
//but you don't have to, I claim no copyright or mental ownership on the code. 
//
//	2005	Jonas Zaddach

// These routines allow access to PCI configuration space.

#include "kernelBusPCI.h"
#include "kernelProcessorX86.h"
#include "kernelLog.h"
#include "kernelMiscFunctions.h"
#include "kernelMalloc.h"
#include "kernelFileStream.h"
#include <stdlib.h>
#include <sys/errors.h>

#define PCI_DEBUG

#define hexStringToInt(x)	xtoi(x)

pciSubclassCode subclass_old[] = 
{
	{0x00, "other"},
	{0x01, "VGA"},
	{-1, ""}
};

pciSubclassCode subclass_disk[] = 
{
	{0x00, "SCSI"},
	{0x01, "IDE"},
	{0x02, "floppy"},
	{0x03, "IPI"},
	{0x04, "RAID"},
	{-1, ""}
};

pciSubclassCode subclass_net[] = 
{
	{0x00, "Ethernet"},
	{0x01, "Token Ring"},
	{0x02, "FDDI"},
	{0x03, "ATM"},
	{-1, ""}
};

pciSubclassCode subclass_graphics[] = 
{
	{0x00, "VGA"},
	{0x01, "SuperVGA"},
	{0x02, "XGA"},
	{-1, ""}
};

pciSubclassCode subclass_mma[] = 
{
	{0x00, "video"},
	{0x01, "audio"},
	{-1, ""}
};

pciSubclassCode subclass_mem[] =
{
	{0x00, "RAM"},
	{0x01, "Flash"},
	{-1, ""}
};

pciSubclassCode subclass_bridge[] = 
{
	{0x00, "CPU/PCI"},
	{0x01, "PCI/ISA"},
	{0x02, "PCI/EISA"},
	{0x03, "PCI/MCA"},
	{0x04, "PCI/PCI"},
	{0x05, "PCI/PCMCIA"},
	{0x06, "PCI/NuBus"},
	{0x07, "PCI/cardbus"},
	{-1, ""}
};

pciSubclassCode subclass_comm[] = 
{
	{ 0x00, "serial" },
	{ 0x01, "parallel" },
	{-1, ""}
};

pciSubclassCode subclass_sys[] = 
{
	{ 0x00, "PIC" },
	{ 0x01, "DMAC" },
	{ 0x02, "timer" },
	{ 0x03, "RTC" },
	{-1, ""}
};

pciSubclassCode subclass_hid[] = 
{
	{ 0x00, "keyboard" },
	{ 0x01, "digitizer" },
	{ 0x02, "mouse" },
	{-1, ""}
};

pciSubclassCode subclass_dock[] = 
{
	{ 0x00, "generic" },
	{-1, ""}
};

pciSubclassCode subclass_cpu[] = 
{
	{ 0x00, "386" },
	{ 0x01, "486" },
	{ 0x02, "Pentium" },
	{ 0x03, "P6" },
	{ 0x10, "Alpha" },
	{ 0x40, "Coprocessor" },
	{-1, ""}
};

pciSubclassCode subclass_serial[] = 
{
	{ 0x00, "Firewire" },
	{ 0x01, "ACCESS.bus" },
	{ 0x02, "SSA" },
	{ 0x03, "USB" },
	{ 0x04, "Fiber Channel" },
	{-1, ""}
};
	
pciClassCode kernelBusPCIClassNames[] = 
{
	{0x00, "before PCI 2.0", subclass_old},
	{0x01, "disk controller", subclass_disk},
	{0x02, "network interface", subclass_net},
	{0x03, "graphics adapter", subclass_graphics},
	{0x04, "multimedia adapter", subclass_mma},
	{0x05, "memory", subclass_mem},
	{0x06, "bridge", subclass_bridge},
	{0x07, "communication", subclass_comm},
	{0x08, "system peripheral", subclass_sys},
	{0x09, "HID", subclass_hid},
	{0x0a, "docking station", subclass_dock},
	{0x0b, "CPU", subclass_cpu},
	{0x0c, "serial bus", subclass_serial},
	{-1, "", 0}
};

const char * invalidDevice = "invalid device";

const char * otherDevice = "other";

int kernelBusPCIGetClassName(int classcode, int subclasscode, char ** classname, char ** subclassname)
{
//returns name of the class and the subclass in human readable format. Buffers classname and subclassname have to provide  
	int status = 0;
	
	int i;
	
	for(i = 0; i < 256; i++)
	{	
		//If no more classcodes are in the list
		if(kernelBusPCIClassNames[i].classcode == -1)
		{
			*classname = (char *) invalidDevice;
			return (status = INVALID_CLASSCODE);
		}
		
		//if valid classcode is found
		if(kernelBusPCIClassNames[i].classcode == classcode)
		{
			*classname = (char *) kernelBusPCIClassNames[i].name;
			
			break;
		}
	}
	
	//Subclasscode 0x80 is always other
	if(subclasscode == 0x80)
	{
		*subclassname = (char *) otherDevice;
		
		return (status);
	}
	
	pciSubclassCode * subclass = kernelBusPCIClassNames[classcode].subclass;
	
	for(i = 0; i < 256; i++)
	{
		if(subclass[i].subclasscode == -1)
		{
			*subclassname = (char *) invalidDevice;
			
			return (status = INVALID_SUBCLASSCODE);
		}
		
//		kernelLog("subclasscode: %x, expected: %x\n", subclass[i].subclasscode, subclasscode);
		
		if(subclass[i].subclasscode == subclasscode)
		{
			*subclassname = (char *) subclass[i].name;
			
			break;
		}
	}
	
	return (status);
}

int kernelBusPCIFindController(void)
{
//Checks for a configuration mechanism #1 able PCI controller
//returns 0 if controller is found, otherwise -1

	DWORD reply = 0;
	
	int status = 0;
	
	kernelProcessorOutPort32(CONFIG_PORT, 0x80000000L);
	
	kernelProcessorInPort32(CONFIG_PORT, reply);
	
	if(reply != 0x80000000L)
	{
	   return (status = -1);
	}
	
	return (status);
}  

int kernelBusPCIReadConfig8(int bus, int device, int function, int reg, BYTE *data)
{
//Reads 1 byte of the PCI configuration header of the requested device. bus, device and function identify the device,
//register is which byte you want to read. The data will be written into data.
	int status = 0;
	
	DWORD address;
	
	address = 0x80000000L | 
		(((DWORD) (bus & 0xff) << 16) | ((device & 0x1f)  << 11) | ((function & 0x07) << 8) | (reg & 0xfc));
	
	kernelProcessorOutPort32(CONFIG_PORT, address) ;
		
	kernelProcessorInPort8(DATA_PORT + (reg & 3), *data) ;
	
	return (status = 0) ;
}

int kernelBusPCIWriteConfig8(int bus, int device, int function, int reg, BYTE data)
{
//Writes 1 byte of the PCI configuration header of the requested device. bus, device and function identify the device,
//register is which byte you want to write. data is the byte you want to write.
	int status = 0;
	
	DWORD address;
	
	address = 0x80000000L | 
		(((DWORD) (bus & 0xff) << 16) | ((device & 0x1f)  << 11) | ((function & 0x07) << 8) | (reg & 0xfc));
	
	kernelProcessorOutPort32(CONFIG_PORT, address) ;
		
	kernelProcessorOutPort8(DATA_PORT + (reg & 3), data) ;
	
	return (status = 0) ;
}

int kernelBusPCIReadConfig16(int bus, int device, int function, int reg, WORD *data)
{
//Reads configuration word
	int status = 0;
	
	DWORD address;
	
	address = 0x80000000L | 
		(((DWORD) (bus & 0xff) << 16) | ((device & 0x1f)  << 11) | ((function & 0x07) << 8) | (reg & 0xfc));
	
	kernelProcessorOutPort32(CONFIG_PORT, address) ;
		
	kernelProcessorInPort16(DATA_PORT + (reg & 2), *data) ;
	
	return (status = 0) ;
}

int kernelBusPCIWriteConfig16(int bus, int device, int function, int reg, WORD data)
{
//writes configuration word
	int status = 0;
	
	DWORD address;
	
	address = 0x80000000L | 
		(((DWORD) (bus & 0xff) << 16) | ((device & 0x1f)  << 11) | ((function & 0x07) << 8) | (reg & 0xfc));
	
	kernelProcessorOutPort32(CONFIG_PORT, address) ;
		
	kernelProcessorOutPort16(DATA_PORT + (reg & 2), data) ;
	
	return (status = 0) ;
}

int kernelBusPCIReadConfig32(int bus, int device, int function, int reg, DWORD *data)
{
//reads configuration dword
	int status = 0;
	
	DWORD address;
	
	address = 0x80000000L | 
		(((DWORD) (bus & 0xff) << 16) | ((device & 0x1f)  << 11) | ((function & 0x07) << 8) | (reg & 0xfc));
	
	kernelProcessorOutPort32(CONFIG_PORT, address) ;
		
	kernelProcessorInPort32(DATA_PORT, *data) ;
	
	return (status = 0) ;
}

int kernelBusPCIWriteConfig32(int bus, int device, int function, int reg, DWORD data)
{
//writes configuration dword
	int status = 0;
	
	DWORD address;
	
	address = 0x80000000L | 
		(((DWORD) (bus & 0xff) << 16) | ((device & 0x1f)  << 11) | ((function & 0x07) << 8) | (reg & 0xfc));