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📄 mach_dep.c

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/*  * Copyright 1988, 1989 Hans-J. Boehm, Alan J. Demers * Copyright (c) 1991-1994 by Xerox Corporation.  All rights reserved. * * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED * OR IMPLIED.  ANY USE IS AT YOUR OWN RISK. * * Permission is hereby granted to use or copy this program * for any purpose,  provided the above notices are retained on all copies. * Permission to modify the code and to distribute modified code is granted, * provided the above notices are retained, and a notice that the code was * modified is included with the above copyright notice. *//* Boehm, November 17, 1995 12:13 pm PST */# include "private/gc_priv.h"# include <stdio.h># include <setjmp.h># if defined(OS2) || defined(CX_UX)#   define _setjmp(b) setjmp(b)#   define _longjmp(b,v) longjmp(b,v)# endif# ifdef AMIGA#   ifndef __GNUC__#     include <dos.h>#   else#     include <machine/reg.h>#   endif# endif#if defined(RS6000) || defined(POWERPC)# include <ucontext.h>#endif#if defined(__MWERKS__) && !defined(POWERPC)asm static void PushMacRegisters(){    sub.w   #4,sp                   // reserve space for one parameter.    move.l  a2,(sp)    jsr		GC_push_one    move.l  a3,(sp)    jsr		GC_push_one    move.l  a4,(sp)    jsr		GC_push_one#   if !__option(a6frames)	// <pcb> perhaps a6 should be pushed if stack frames are not being used.      	move.l	a6,(sp)  	jsr		GC_push_one#   endif	// skip a5 (globals), a6 (frame pointer), and a7 (stack pointer)    move.l  d2,(sp)    jsr		GC_push_one    move.l  d3,(sp)    jsr		GC_push_one    move.l  d4,(sp)    jsr		GC_push_one    move.l  d5,(sp)    jsr		GC_push_one    move.l  d6,(sp)    jsr		GC_push_one    move.l  d7,(sp)    jsr		GC_push_one    add.w   #4,sp                   // fix stack.    rts}#endif /* __MWERKS__ */# if defined(SPARC) || defined(IA64)    /* Value returned from register flushing routine; either sp (SPARC) */    /* or ar.bsp (IA64)							*/    word GC_save_regs_ret_val;# endif/* Routine to mark from registers that are preserved by the C compiler. *//* This must be ported to every new architecture.  There is a generic   *//* version at the end, that is likely, but not guaranteed to work       *//* on your architecture.  Run the test_setjmp program to see whether    *//* there is any chance it will work.                                    */#if !defined(USE_GENERIC_PUSH_REGS) && !defined(USE_ASM_PUSH_REGS)#undef HAVE_PUSH_REGSvoid GC_push_regs(){#       ifdef RT	  register long TMP_SP; /* must be bound to r11 */#       endif#       ifdef VAX	  /* VAX - generic code below does not work under 4.2 */	  /* r1 through r5 are caller save, and therefore     */	  /* on the stack or dead.                            */	  asm("pushl r11");     asm("calls $1,_GC_push_one");	  asm("pushl r10"); 	asm("calls $1,_GC_push_one");	  asm("pushl r9");	asm("calls $1,_GC_push_one");	  asm("pushl r8");	asm("calls $1,_GC_push_one");	  asm("pushl r7");	asm("calls $1,_GC_push_one");	  asm("pushl r6");	asm("calls $1,_GC_push_one");#	  define HAVE_PUSH_REGS#       endif#       if defined(M68K) && (defined(SUNOS4) || defined(NEXT))	/*  M68K SUNOS - could be replaced by generic code */	  /* a0, a1 and d1 are caller save          */	  /*  and therefore are on stack or dead.   */		  asm("subqw #0x4,sp");		/* allocate word on top of stack */	  asm("movl a2,sp@");	asm("jbsr _GC_push_one");	  asm("movl a3,sp@");	asm("jbsr _GC_push_one");	  asm("movl a4,sp@");	asm("jbsr _GC_push_one");	  asm("movl a5,sp@");	asm("jbsr _GC_push_one");	  /* Skip frame pointer and stack pointer */	  asm("movl d1,sp@");	asm("jbsr _GC_push_one");	  asm("movl d2,sp@");	asm("jbsr _GC_push_one");	  asm("movl d3,sp@");	asm("jbsr _GC_push_one");	  asm("movl d4,sp@");	asm("jbsr _GC_push_one");	  asm("movl d5,sp@");	asm("jbsr _GC_push_one");	  asm("movl d6,sp@");	asm("jbsr _GC_push_one");	  asm("movl d7,sp@");	asm("jbsr _GC_push_one");	  asm("addqw #0x4,sp");		/* put stack back where it was	*/#	  define HAVE_PUSH_REGS#       endif#       if defined(M68K) && defined(HP)	/*  M68K HP - could be replaced by generic code */	  /* a0, a1 and d1 are caller save.  */		  asm("subq.w &0x4,%sp");	/* allocate word on top of stack */	  asm("mov.l %a2,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %a3,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %a4,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %a5,(%sp)"); asm("jsr _GC_push_one");	  /* Skip frame pointer and stack pointer */	  asm("mov.l %d1,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %d2,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %d3,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %d4,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %d5,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %d6,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %d7,(%sp)"); asm("jsr _GC_push_one");	  asm("addq.w &0x4,%sp");	/* put stack back where it was	*/#	  define HAVE_PUSH_REGS#       endif /* M68K HP */#	if defined(M68K) && defined(AMIGA) 	 /*  AMIGA - could be replaced by generic code 			*/ 	 /* a0, a1, d0 and d1 are caller save */#        ifdef __GNUC__	  asm("subq.w &0x4,%sp");	/* allocate word on top of stack */	  asm("mov.l %a2,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %a3,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %a4,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %a5,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %a6,(%sp)"); asm("jsr _GC_push_one");	  /* Skip frame pointer and stack pointer */	  asm("mov.l %d2,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %d3,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %d4,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %d5,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %d6,(%sp)"); asm("jsr _GC_push_one");	  asm("mov.l %d7,(%sp)"); asm("jsr _GC_push_one");	  asm("addq.w &0x4,%sp");	/* put stack back where it was	*/#	  define HAVE_PUSH_REGS#        else /* !__GNUC__ */	  GC_push_one(getreg(REG_A2));	  GC_push_one(getreg(REG_A3));#         ifndef __SASC	      /* Can probably be changed to #if 0 -Kjetil M. (a4=globals)*/	    GC_push_one(getreg(REG_A4));#	  endif	  GC_push_one(getreg(REG_A5));	  GC_push_one(getreg(REG_A6));	  /* Skip stack pointer */	  GC_push_one(getreg(REG_D2));	  GC_push_one(getreg(REG_D3));	  GC_push_one(getreg(REG_D4));	  GC_push_one(getreg(REG_D5));	  GC_push_one(getreg(REG_D6));	  GC_push_one(getreg(REG_D7));#	  define HAVE_PUSH_REGS#	 endif /* !__GNUC__ */#       endif /* AMIGA */#	if defined(M68K) && defined(MACOS)#	if defined(THINK_C)#         define PushMacReg(reg) \              move.l  reg,(sp) \              jsr             GC_push_one	  asm {              sub.w   #4,sp                   ; reserve space for one parameter.              PushMacReg(a2);              PushMacReg(a3);              PushMacReg(a4);              ; skip a5 (globals), a6 (frame pointer), and a7 (stack pointer)              PushMacReg(d2);              PushMacReg(d3);              PushMacReg(d4);              PushMacReg(d5);              PushMacReg(d6);              PushMacReg(d7);              add.w   #4,sp                   ; fix stack.	  }#	  define HAVE_PUSH_REGS#	  undef PushMacReg#	endif /* THINK_C */#	if defined(__MWERKS__)	  PushMacRegisters();#	  define HAVE_PUSH_REGS#	endif	/* __MWERKS__ */#   endif	/* MACOS */#       if defined(I386) &&!defined(OS2) &&!defined(SVR4) \	&& (defined(__MINGW32__) || !defined(MSWIN32)) \	&& !defined(SCO) && !defined(SCO_ELF) \ 	&& !(defined(LINUX) && defined(__ELF__)) \	&& !(defined(FREEBSD) && defined(__ELF__)) \	&& !(defined(NETBSD) && defined(__ELF__)) \	&& !(defined(OPENBSD) && defined(__ELF__)) \	&& !(defined(BEOS) && defined(__ELF__)) \	&& !defined(DOS4GW) && !defined(HURD)	/* I386 code, generic code does not appear to work */	/* It does appear to work under OS2, and asms dont */	/* This is used for some 38g UNIX variants and for CYGWIN32 */	  asm("pushl %eax");  asm("call _GC_push_one"); asm("addl $4,%esp");	  asm("pushl %ecx");  asm("call _GC_push_one"); asm("addl $4,%esp");	  asm("pushl %edx");  asm("call _GC_push_one"); asm("addl $4,%esp");	  asm("pushl %ebp");  asm("call _GC_push_one"); asm("addl $4,%esp");	  asm("pushl %esi");  asm("call _GC_push_one"); asm("addl $4,%esp");	  asm("pushl %edi");  asm("call _GC_push_one"); asm("addl $4,%esp");	  asm("pushl %ebx");  asm("call _GC_push_one"); asm("addl $4,%esp");#	  define HAVE_PUSH_REGS#       endif#	if ( defined(I386) && defined(LINUX) && defined(__ELF__) ) \	|| ( defined(I386) && defined(FREEBSD) && defined(__ELF__) ) \	|| ( defined(I386) && defined(NETBSD) && defined(__ELF__) ) \	|| ( defined(I386) && defined(OPENBSD) && defined(__ELF__) ) \	|| ( defined(I386) && defined(HURD) && defined(__ELF__) ) \	|| ( defined(I386) && defined(DGUX) )	/* This is modified for Linux with ELF (Note: _ELF_ only) */	/* This section handles FreeBSD with ELF. */	/* Eax is caller-save and dead here.  Other caller-save 	*/	/* registers could also be skipped.  We assume there are no	*/	/* pointers in MMX registers, etc.				*/	/* We combine instructions in a single asm to prevent gcc from 	*/	/* inserting code in the middle.				*/	  asm("pushl %ecx; call GC_push_one; addl $4,%esp");	  asm("pushl %edx; call GC_push_one; addl $4,%esp");	  asm("pushl %ebp; call GC_push_one; addl $4,%esp");	  asm("pushl %esi; call GC_push_one; addl $4,%esp");	  asm("pushl %edi; call GC_push_one; addl $4,%esp");	  asm("pushl %ebx; call GC_push_one; addl $4,%esp");#	  define HAVE_PUSH_REGS#	endif#	if ( defined(I386) && defined(BEOS) && defined(__ELF__) )	/* As far as I can understand from				*/	/* http://www.beunited.org/articles/jbq/nasm.shtml,		*/	/* only ebp, esi, edi and ebx are not scratch. How MMX 		*/	/* etc. registers should be treated, I have no idea. 		*/	  asm("pushl %ebp; call GC_push_one; addl $4,%esp");	  asm("pushl %esi; call GC_push_one; addl $4,%esp");	  asm("pushl %edi; call GC_push_one; addl $4,%esp");	  asm("pushl %ebx; call GC_push_one; addl $4,%esp");#	  define HAVE_PUSH_REGS#       endif#       if defined(I386) && defined(MSWIN32) && !defined(__MINGW32__) \	   && !defined(USE_GENERIC)	/* I386 code, Microsoft variant		*/	  __asm  push eax	  __asm  call GC_push_one	  __asm  add esp,4	  __asm  push ebx	  __asm  call GC_push_one	  __asm  add esp,4	  __asm  push ecx	  __asm  call GC_push_one	  __asm  add esp,4	  __asm  push edx	  __asm  call GC_push_one	  __asm  add esp,4	  __asm  push ebp	  __asm  call GC_push_one	  __asm  add esp,4	  __asm  push esi	  __asm  call GC_push_one	  __asm  add esp,4	  __asm  push edi	  __asm  call GC_push_one	  __asm  add esp,4#	  define HAVE_PUSH_REGS#       endif#       if defined(I386) && (defined(SVR4) || defined(SCO) || defined(SCO_ELF))	/* I386 code, SVR4 variant, generic code does not appear to work */	  asm("pushl %eax");  asm("call GC_push_one"); asm("addl $4,%esp");	  asm("pushl %ebx");  asm("call GC_push_one"); asm("addl $4,%esp");	  asm("pushl %ecx");  asm("call GC_push_one"); asm("addl $4,%esp");	  asm("pushl %edx");  asm("call GC_push_one"); asm("addl $4,%esp");	  asm("pushl %ebp");  asm("call GC_push_one"); asm("addl $4,%esp");	  asm("pushl %esi");  asm("call GC_push_one"); asm("addl $4,%esp");	  asm("pushl %edi");  asm("call GC_push_one"); asm("addl $4,%esp");#	  define HAVE_PUSH_REGS#       endif#       ifdef NS32K

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